On 6/30/2026 1:30 AM, Mark Zhuang wrote:
From: Mark Zhuang <[email protected]> Add the Spacemit-A100 processor to -mcpu/-mtune. The A100 is an in-order, dual-issue core whose microarchitecture is close to the X60, so for now it reuses the Spacemit X60 costs. On the ISA side, the A100 is closest to the X100. The main differences are that it does not implement the H (hypervisor) extension, its vector length is VLEN=1024 (zvl1024b), and it has the xsmtvdotii extension. gcc/ChangeLog: * config/riscv/riscv-ext-spacemit.def (xsmtvdotii): New extension. * config/riscv/riscv-ext.opt: Regenerate. * config/riscv/riscv-cores.def (RISCV_TUNE): Add spacemit-a100. (RISCV_CORE): Add spacemit-a100. * doc/riscv-ext.texi: Regenerate. * doc/riscv-mcpu.texi: Regenerate. * doc/riscv-mtune.texi: Regenerate. gcc/testsuite/ChangeLog: * gcc.target/riscv/mcpu-spacemit-a100.c: New test.
THanks. I've pushed this to the trunk. jeff
