Hi Mike, Is this patch ok for backporting toGCC 16? -Surya
On 11/07/26 1:17 AM, Michael Meissner wrote: > On Thu, Jul 09, 2026 at 05:57:59PM +0530, Surya Kumari Jangala wrote: >> Add the -mdense-math/-mno-dense-math compiler option to control emission >> of Dense Math Facility (DMF) instructions which may be supported on a >> future Power processor. The option is backed by OPTION_MASK_DMF and >> exposes a TARGET_DMF macro for use throughout the backend. >> >> When -mcpu=future is specified and -mdense-math is not mentioned >> explicitly, DMF is enabled automatically. Explicitly requesting >> -mdense-math on a non-future target is a hard error. > > While the patch is fine just to establish -mdense-math, please develop > the remaining patches to add dense math registers, and then submit them > together (either as one large patch, or multiple smaller patches linked > together being posted as replies to an introduction text). > > Note, you should add code in rs6000-c.cc to define something like > __DENSE_MATH__ if dense math registers are enabled. > > For the next set of patches, initially don't worry about the 1,024 bit > support. Just add the initial support for 512-bit registers that the > current MMA instructions use. It is unfortunate that my existing > patches can't be used. > > We do need a constraint that will match a dense math register if > -mdense-math is enabled, and an appropriate quad set of vector > registers in the traditional FPR allocation range (i.e. 0..31) if we > have -mma but not -mdense-math. I happened to use 'wD'. The wD > constraint will need to be documented. Or we can use some other w<X> > constraint that isn't used by either us or LLVM. > > We will also need predicates that can match an accumulator, either as a > dense math register or the VSX registers 0..31. > > Then we need to modify mma.md to use the wD constraint, so that when > -mdense-math is implemented, the MMA instructions will work properly. > > Then after that, go the next step to add the 1,024 bit support. > > I've learned in the past if you do things piece-meal, eventually you > will need to rework an existing patch. This patch is simple enough, > but again as we go down the road to add dense math registers for real, > you need to implement them completely before submitting patches. > > > >> 2026-07-09 Surya Kumari Jangala <[email protected]> >> >> gcc: >> * config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): Add >> OPTION_MASK_DMF. >> (POWERPC_MASKS): Likewise. >> * config/rs6000/rs6000.cc (rs6000_option_override_internal): Enable >> OPTION_MASK_DMF by default when TARGET_FUTURE is set and the >> flag was not explicitly given; emit an error and clear the flag >> when -mdense-math is requested on a non-future target. >> (rs6000_opt_masks): Add "dense-math" entry for OPTION_MASK_DMF. >> * config/rs6000/rs6000.opt (mdense-math): New option backed by >> Mask(DMF). >> * doc/invoke.texi: Add -mdense-math. >> --- >> gcc/config/rs6000/rs6000-cpus.def | 4 +++- >> gcc/config/rs6000/rs6000.cc | 14 ++++++++++++++ >> gcc/config/rs6000/rs6000.opt | 4 ++++ >> gcc/doc/invoke.texi | 12 ++++++++++-- >> 4 files changed, 31 insertions(+), 3 deletions(-) >> >> diff --git a/gcc/config/rs6000/rs6000-cpus.def >> b/gcc/config/rs6000/rs6000-cpus.def >> index a110860acce..365e0c6899c 100644 >> --- a/gcc/config/rs6000/rs6000-cpus.def >> +++ b/gcc/config/rs6000/rs6000-cpus.def >> @@ -85,7 +85,8 @@ >> >> /* -mcpu=future flags. */ >> #define FUTURE_MASKS_SERVER (POWER11_MASKS_SERVER \ >> - | OPTION_MASK_FUTURE) >> + | OPTION_MASK_FUTURE \ >> + | OPTION_MASK_DMF) >> >> /* Flags that need to be turned off if -mno-vsx. */ >> #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX >> \ >> @@ -126,6 +127,7 @@ >> | OPTION_MASK_POWER10 \ >> | OPTION_MASK_POWER11 \ >> | OPTION_MASK_FUTURE \ >> + | OPTION_MASK_DMF \ >> | OPTION_MASK_P10_FUSION \ >> | OPTION_MASK_HTM \ >> | OPTION_MASK_ISEL \ >> diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc >> index d8669d9ffce..7743c9cdc4a 100644 >> --- a/gcc/config/rs6000/rs6000.cc >> +++ b/gcc/config/rs6000/rs6000.cc >> @@ -4381,6 +4381,19 @@ rs6000_option_override_internal (bool global_init_p) >> rs6000_isa_flags &= ~OPTION_MASK_MMA; >> } >> >> + /* Enable -mdense_math by default on future systems. */ >> + if (TARGET_FUTURE && (rs6000_isa_flags_explicit & OPTION_MASK_DMF) == 0) >> + rs6000_isa_flags |= OPTION_MASK_DMF; >> + >> + /* Turn off DMF options on non-future systems. */ >> + else if (!TARGET_FUTURE && TARGET_DMF) >> + { >> + if ((rs6000_isa_flags_explicit & OPTION_MASK_DMF) != 0) >> + error ("%qs requires %qs", "-mdense_math", "-mcpu=future"); >> + >> + rs6000_isa_flags &= ~OPTION_MASK_DMF; >> + } >> + >> /* Enable power10 fusion if we are tuning for power10, even if we aren't >> generating power10 instructions. */ >> if (!(rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION)) >> @@ -24470,6 +24483,7 @@ static struct rs6000_opt_mask const >> rs6000_opt_masks[] = >> { "power10", OPTION_MASK_POWER10, false, >> true }, >> { "power11", OPTION_MASK_POWER11, false, >> false }, >> { "future", OPTION_MASK_FUTURE, false, >> false }, >> + { "dense-math", OPTION_MASK_DMF, false, true }, >> { "hard-dfp", OPTION_MASK_DFP, false, >> true }, >> { "htm", OPTION_MASK_HTM, false, true }, >> { "isel", OPTION_MASK_ISEL, false, true }, >> diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt >> index 2b6ec5222fc..d9e9de92b21 100644 >> --- a/gcc/config/rs6000/rs6000.opt >> +++ b/gcc/config/rs6000/rs6000.opt >> @@ -599,6 +599,10 @@ Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) >> WarnRemoved >> mfuture >> Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use >> %<-mfuture>, use %<-mcpu=future>) >> >> +mdense-math >> +Target Mask(DMF) Var(rs6000_isa_flags) >> +Generate (do not generate) DMF (Dense Math Facility) instructions. >> + >> mprefixed >> Target Mask(PREFIXED) Var(rs6000_isa_flags) >> Generate (do not generate) prefixed memory instructions. >> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi >> index 606d666cd51..3e43761652e 100644 >> --- a/gcc/doc/invoke.texi >> +++ b/gcc/doc/invoke.texi >> @@ -1406,7 +1406,7 @@ See RS/6000 and PowerPC Options. >> -mgnu-attribute >> -mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{reg} >> -mstack-protector-guard-offset=@var{offset} -mprefixed >> --mpcrel -mmma -mrop-protect -mprivileged >> +-mpcrel -mmma -mdense-math -mrop-protect -mprivileged >> -mno-splat-word-constant -mno-splat-float-constant >> -mno-ieee128-constant -mno-warn-altivec-long} >> >> @@ -31773,7 +31773,7 @@ following options: >> -mcrypto -mhtm -mpower8-fusion >> -mquad-memory -mquad-memory-atomic -mfloat128 >> -mfloat128-hardware -mprefixed -mpcrel -mmma >> --mrop-protect} >> +-mdense-math -mrop-protect} >> >> The particular options set for any particular CPU varies between >> compiler versions, depending on what setting seems to produce optimal >> @@ -32870,6 +32870,14 @@ Generate (do not generate) the MMA instructions. >> The @option{-mma} >> option requires that the option @option{-mcpu=power10} (or later) >> is enabled. >> >> +@opindex mdense-math >> +@opindex mno-dense-math >> +@item -mdense-math >> +@itemx -mno-dense-math >> +Generate (do not generate) Dense Math Facility (DMF) instructions. >> +The @option{-mdense-math} option requires that the option >> +@option{-mcpu=future} (or later) is enabled. >> + >> @opindex mrop-protect >> @opindex mno-rop-protect >> @item -mrop-protect >> -- >> 2.52.0 >> >
