This patch changes __muldi3_6 to
__muldi3_6:
XCALL __umulhisi3
add C2, 22
adc C3, 23
adc C4, 24
adc C5, 25
adc C6, __zero_reg__
adc C7, __zero_reg__
ret
which is one cycle faster than the previous
...
adc C5, 25
brcc 0f
adiw C6, 1
0: ret
in the case where the BRCC is not taken.
__umulhisi3 clears __zero_reg__, so all is fine.
libgcc/
* config/avr/lib1funcs.S (__muldi3_6): Tweak.
diff --git a/libgcc/config/avr/lib1funcs.S b/libgcc/config/avr/lib1funcs.S
index 2e30c796ef9..f4143d44f00 100644
--- a/libgcc/config/avr/lib1funcs.S
+++ b/libgcc/config/avr/lib1funcs.S
@@ -802,9 +802,9 @@ DEFUN __muldi3_6
adc C3, 23
adc C4, 24
adc C5, 25
- brcc 0f
- adiw C6, 1
-0: ret
+ adc C6, __zero_reg__
+ adc C7, __zero_reg__
+ ret
ENDF __muldi3_6
#endif /* L_muldi3_6 */
Applied as obvious,
Johann