From: Pan Li <[email protected]>
Add test cases for register group overlap, please
note it is not overlap as much as possible.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h:
Add test helper macros.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m1.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m2.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m4.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-mf2.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-mf4.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m1.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m2.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m4.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-mf2.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m1.c: New test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m2.c: New test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m4.c: New test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf2.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf4.c: New
test.
* gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf8.c: New
test.
Signed-off-by: Pan Li <[email protected]>
---
.../rvv/autovec/group_overlap/group_overlap.h | 154 ++++++++++++++++++
.../autovec/group_overlap/vwadd_wv-i16-m1.c | 18 ++
.../autovec/group_overlap/vwadd_wv-i16-m2.c | 18 ++
.../autovec/group_overlap/vwadd_wv-i16-m4.c | 18 ++
.../autovec/group_overlap/vwadd_wv-i16-mf2.c | 32 ++++
.../autovec/group_overlap/vwadd_wv-i16-mf4.c | 32 ++++
.../autovec/group_overlap/vwadd_wv-i32-m1.c | 18 ++
.../autovec/group_overlap/vwadd_wv-i32-m2.c | 18 ++
.../autovec/group_overlap/vwadd_wv-i32-m4.c | 18 ++
.../autovec/group_overlap/vwadd_wv-i32-mf2.c | 32 ++++
.../autovec/group_overlap/vwadd_wv-i8-m1.c | 18 ++
.../autovec/group_overlap/vwadd_wv-i8-m2.c | 18 ++
.../autovec/group_overlap/vwadd_wv-i8-m4.c | 18 ++
.../autovec/group_overlap/vwadd_wv-i8-mf2.c | 32 ++++
.../autovec/group_overlap/vwadd_wv-i8-mf4.c | 32 ++++
.../autovec/group_overlap/vwadd_wv-i8-mf8.c | 32 ++++
16 files changed, 508 insertions(+)
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m1.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m4.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-mf2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-mf4.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m1.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m4.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-mf2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m1.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m4.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf2.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf4.c
create mode 100644
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf8.c
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h
index ab1417f3bef..d3f0943032a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/group_overlap.h
@@ -113,6 +113,145 @@
ST_F ((void *)out, vd14, VL); OUT += VL; \
ST_F ((void *)out, vd15, VL); OUT += VL; \
+#define LOOP_WIDEN_BINARY_BODY_X8(NT, WT, LD_NF, LD_WF, OUT_F, ST_F, OUT, \
+ START, VL) \
+ NT vs0 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs1 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs2 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs3 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs4 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs5 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs6 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs7 = LD_NF ((void *)START, VL); START += VL; \
+ WT vw0 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw1 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw2 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw3 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw4 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw5 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw6 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw7 = LD_WF ((void *)START, VL); START += VL; \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ WT vd0 = OUT_F (vw0, vs0, VL); \
+ WT vd1 = OUT_F (vw1, vs1, VL); \
+ WT vd2 = OUT_F (vw2, vs2, VL); \
+ WT vd3 = OUT_F (vw3, vs3, VL); \
+ WT vd4 = OUT_F (vw4, vs4, VL); \
+ WT vd5 = OUT_F (vw5, vs5, VL); \
+ WT vd6 = OUT_F (vw6, vs6, VL); \
+ WT vd7 = OUT_F (vw7, vs7, VL); \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ ST_F ((void *)out, vd0, VL); OUT += VL; \
+ ST_F ((void *)out, vd1, VL); OUT += VL; \
+ ST_F ((void *)out, vd2, VL); OUT += VL; \
+ ST_F ((void *)out, vd3, VL); OUT += VL; \
+ ST_F ((void *)out, vd4, VL); OUT += VL; \
+ ST_F ((void *)out, vd5, VL); OUT += VL; \
+ ST_F ((void *)out, vd6, VL); OUT += VL; \
+ ST_F ((void *)out, vd7, VL); OUT += VL; \
+
+#define LOOP_WIDEN_BINARY_BODY_X4(NT, WT, LD_NF, LD_WF, OUT_F, ST_F, OUT, \
+ START, VL) \
+ NT vs0 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs1 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs2 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs3 = LD_NF ((void *)START, VL); START += VL; \
+ WT vw0 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw1 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw2 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw3 = LD_WF ((void *)START, VL); START += VL; \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ WT vd0 = OUT_F (vw0, vs0, VL); \
+ WT vd1 = OUT_F (vw1, vs1, VL); \
+ WT vd2 = OUT_F (vw2, vs2, VL); \
+ WT vd3 = OUT_F (vw3, vs3, VL); \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ ST_F ((void *)out, vd0, VL); OUT += VL; \
+ ST_F ((void *)out, vd1, VL); OUT += VL; \
+ ST_F ((void *)out, vd2, VL); OUT += VL; \
+ ST_F ((void *)out, vd3, VL); OUT += VL; \
+
+#define LOOP_WIDEN_BINARY_BODY_X16(NT, WT, LD_NF, LD_WF, OUT_F, ST_F, OUT, \
+ START, VL) \
+ NT vs0 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs1 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs2 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs3 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs4 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs5 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs6 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs7 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs8 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs9 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs10 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs11 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs12 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs13 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs14 = LD_NF ((void *)START, VL); START += VL; \
+ NT vs15 = LD_NF ((void *)START, VL); START += VL; \
+ WT vw0 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw1 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw2 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw3 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw4 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw5 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw6 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw7 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw8 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw9 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw10 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw11 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw12 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw13 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw14 = LD_WF ((void *)START, VL); START += VL; \
+ WT vw15 = LD_WF ((void *)START, VL); START += VL; \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ WT vd0 = OUT_F (vw0, vs0, VL); \
+ WT vd1 = OUT_F (vw1, vs1, VL); \
+ WT vd2 = OUT_F (vw2, vs2, VL); \
+ WT vd3 = OUT_F (vw3, vs3, VL); \
+ WT vd4 = OUT_F (vw4, vs4, VL); \
+ WT vd5 = OUT_F (vw5, vs5, VL); \
+ WT vd6 = OUT_F (vw6, vs6, VL); \
+ WT vd7 = OUT_F (vw7, vs7, VL); \
+ WT vd8 = OUT_F (vw8, vs8, VL); \
+ WT vd9 = OUT_F (vw9, vs9, VL); \
+ WT vd10 = OUT_F (vw10, vs10, VL); \
+ WT vd11 = OUT_F (vw11, vs11, VL); \
+ WT vd12 = OUT_F (vw12, vs12, VL); \
+ WT vd13 = OUT_F (vw13, vs13, VL); \
+ WT vd14 = OUT_F (vw14, vs14, VL); \
+ WT vd15 = OUT_F (vw15, vs15, VL); \
+ \
+ asm volatile("nop" ::: "memory"); \
+ \
+ ST_F ((void *)out, vd0, VL); OUT += VL; \
+ ST_F ((void *)out, vd1, VL); OUT += VL; \
+ ST_F ((void *)out, vd2, VL); OUT += VL; \
+ ST_F ((void *)out, vd3, VL); OUT += VL; \
+ ST_F ((void *)out, vd4, VL); OUT += VL; \
+ ST_F ((void *)out, vd5, VL); OUT += VL; \
+ ST_F ((void *)out, vd6, VL); OUT += VL; \
+ ST_F ((void *)out, vd7, VL); OUT += VL; \
+ ST_F ((void *)out, vd8, VL); OUT += VL; \
+ ST_F ((void *)out, vd9, VL); OUT += VL; \
+ ST_F ((void *)out, vd10, VL); OUT += VL; \
+ ST_F ((void *)out, vd11, VL); OUT += VL; \
+ ST_F ((void *)out, vd12, VL); OUT += VL; \
+ ST_F ((void *)out, vd13, VL); OUT += VL; \
+ ST_F ((void *)out, vd14, VL); OUT += VL; \
+ ST_F ((void *)out, vd15, VL); OUT += VL; \
+
#define DEF_GROUP_OVERLAP_UNARY_0(VL_F, NT, WT, LD_F, OUT_F, ST_F, NAME, \
LOOP_BODY) \
void test_group_overlap_##NAME##_##NT##_unary_0(uint8_t *data, \
@@ -128,4 +267,19 @@
} \
}
+#define DEF_GROUP_OVERLAP_BINARY_0(VL_F, NT, WT, LD_NF, LD_WF, OUT_F, ST_F, \
+ NAME, LOOP_BODY) \
+ void test_group_overlap_##NAME##_##NT##_binary_0(uint8_t *data, \
+ uint8_t *out, \
+ size_t limit) \
+ { \
+ uint8_t *start = data; \
+ uint8_t *end = data + limit; \
+ size_t vl = VL_F (); \
+ \
+ while (start < end) { \
+ LOOP_BODY (NT, WT, LD_NF, LD_WF, OUT_F, ST_F, out, start, vl); \
+ } \
+ }
+
#endif
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m1.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m1.c
new file mode 100644
index 00000000000..237546a47e7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e16m1,
+ vint16m1_t,
+ vint32m2_t,
+ __riscv_vle16_v_i16m1,
+ __riscv_vle32_v_i32m2,
+ __riscv_vwadd_wv_i32m2,
+ __riscv_vse32_v_i32m2,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v0,v4,v1([^0-9]|$)} 1 } } */
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v2,v2,v25} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m2.c
new file mode 100644
index 00000000000..15df84ba4c2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m2.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e16m2,
+ vint16m2_t,
+ vint32m4_t,
+ __riscv_vle16_v_i16m2,
+ __riscv_vle32_v_i32m4,
+ __riscv_vwadd_wv_i32m4,
+ __riscv_vse32_v_i32m4,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X8)
+
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v0,v8,v2} 1 } } */
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v16,v16,v0} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m4.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m4.c
new file mode 100644
index 00000000000..4bd4c44bbde
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-m4.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e16m4,
+ vint16m4_t,
+ vint32m8_t,
+ __riscv_vle16_v_i16m4,
+ __riscv_vle32_v_i32m8,
+ __riscv_vwadd_wv_i32m8,
+ __riscv_vse32_v_i32m8,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X4)
+
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v0,v0,v12} 1 } } */
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v8,v8,v28} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-mf2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-mf2.c
new file mode 100644
index 00000000000..cbafc42e663
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-mf2.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e16m1,
+ vint16mf2_t,
+ vint32m1_t,
+ __riscv_vle16_v_i16mf2,
+ __riscv_vle32_v_i32m1,
+ __riscv_vwadd_wv_i32m1,
+ __riscv_vse32_v_i32m1,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v0,v[0-9]+,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v2,v[0-9]+,v3([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v4,v[0-9]+,v5([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v6,v[0-9]+,v7([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v8,v[0-9]+,v9([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v10,v[0-9]+,v11([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v12,v[0-9]+,v13([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v14,v[0-9]+,v15([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v16,v[0-9]+,v17([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v18,v[0-9]+,v19([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v20,v[0-9]+,v21([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v22,v[0-9]+,v23([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v24,v[0-9]+,v25([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v26,v[0-9]+,v27([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v28,v[0-9]+,v29([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v30,v[0-9]+,v31([^0-9]|$)} } }
*/
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-mf4.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-mf4.c
new file mode 100644
index 00000000000..9dfa0d5658a
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i16-mf4.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e16m1,
+ vint16mf4_t,
+ vint32mf2_t,
+ __riscv_vle16_v_i16mf4,
+ __riscv_vle32_v_i32mf2,
+ __riscv_vwadd_wv_i32mf2,
+ __riscv_vse32_v_i32mf2,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v0,v[0-9]+,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v2,v[0-9]+,v3([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v4,v[0-9]+,v5([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v6,v[0-9]+,v7([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v8,v[0-9]+,v9([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v10,v[0-9]+,v11([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v12,v[0-9]+,v13([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v14,v[0-9]+,v15([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v16,v[0-9]+,v17([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v18,v[0-9]+,v19([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v20,v[0-9]+,v21([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v22,v[0-9]+,v23([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v24,v[0-9]+,v25([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v26,v[0-9]+,v27([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v28,v[0-9]+,v29([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v30,v[0-9]+,v31([^0-9]|$)} } }
*/
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m1.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m1.c
new file mode 100644
index 00000000000..f4ec147916d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e32m1,
+ vint32m1_t,
+ vint64m2_t,
+ __riscv_vle32_v_i32m1,
+ __riscv_vle64_v_i64m2,
+ __riscv_vwadd_wv_i64m2,
+ __riscv_vse64_v_i64m2,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v0,v4,v1([^0-9]|$)} 1 } } */
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v2,v2,v25} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m2.c
new file mode 100644
index 00000000000..aefe4ad98f5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m2.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e32m2,
+ vint32m2_t,
+ vint64m4_t,
+ __riscv_vle32_v_i32m2,
+ __riscv_vle64_v_i64m4,
+ __riscv_vwadd_wv_i64m4,
+ __riscv_vse64_v_i64m4,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X8)
+
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v0,v8,v2} 1 } } */
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v16,v16,v0} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m4.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m4.c
new file mode 100644
index 00000000000..8557f0c5df6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-m4.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e32m4,
+ vint32m4_t,
+ vint64m8_t,
+ __riscv_vle32_v_i32m4,
+ __riscv_vle64_v_i64m8,
+ __riscv_vwadd_wv_i64m8,
+ __riscv_vse64_v_i64m8,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X4)
+
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v0,v0,v12} 1 } } */
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v8,v8,v28} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-mf2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-mf2.c
new file mode 100644
index 00000000000..dfcff375b28
--- /dev/null
+++
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i32-mf2.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e32m1,
+ vint32mf2_t,
+ vint64m1_t,
+ __riscv_vle32_v_i32mf2,
+ __riscv_vle64_v_i64m1,
+ __riscv_vwadd_wv_i64m1,
+ __riscv_vse64_v_i64m1,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v0,v[0-9]+,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v2,v[0-9]+,v3([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v4,v[0-9]+,v5([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v6,v[0-9]+,v7([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v8,v[0-9]+,v9([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v10,v[0-9]+,v11([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v12,v[0-9]+,v13([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v14,v[0-9]+,v15([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v16,v[0-9]+,v17([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v18,v[0-9]+,v19([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v20,v[0-9]+,v21([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v22,v[0-9]+,v23([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v24,v[0-9]+,v25([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v26,v[0-9]+,v27([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v28,v[0-9]+,v29([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v30,v[0-9]+,v31([^0-9]|$)} } }
*/
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m1.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m1.c
new file mode 100644
index 00000000000..280e8c5539b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m1.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e8m1,
+ vint8m1_t,
+ vint16m2_t,
+ __riscv_vle8_v_i8m1,
+ __riscv_vle16_v_i16m2,
+ __riscv_vwadd_wv_i16m2,
+ __riscv_vse16_v_i16m2,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v0,v4,v1([^0-9]|$)} 1 } } */
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v2,v2,v25} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m2.c
new file mode 100644
index 00000000000..a01fe60e9d1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m2.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e8m2,
+ vint8m2_t,
+ vint16m4_t,
+ __riscv_vle8_v_i8m2,
+ __riscv_vle16_v_i16m4,
+ __riscv_vwadd_wv_i16m4,
+ __riscv_vse16_v_i16m4,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X8)
+
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v0,v8,v2} 1 } } */
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v16,v16,v0} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m4.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m4.c
new file mode 100644
index 00000000000..c94d27a8426
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-m4.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e8m4,
+ vint8m4_t,
+ vint16m8_t,
+ __riscv_vle8_v_i8m4,
+ __riscv_vle16_v_i16m8,
+ __riscv_vwadd_wv_i16m8,
+ __riscv_vse16_v_i16m8,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X4)
+
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v0,v0,v12} 1 } } */
+/* { dg-final { scan-assembler-times {vwadd\.wv\s+v8,v8,v28} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf2.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf2.c
new file mode 100644
index 00000000000..7e014a7da4a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf2.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e8m1,
+ vint8mf2_t,
+ vint16m1_t,
+ __riscv_vle8_v_i8mf2,
+ __riscv_vle16_v_i16m1,
+ __riscv_vwadd_wv_i16m1,
+ __riscv_vse16_v_i16m1,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v0,v[0-9]+,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v2,v[0-9]+,v3([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v4,v[0-9]+,v5([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v6,v[0-9]+,v7([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v8,v[0-9]+,v9([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v10,v[0-9]+,v11([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v12,v[0-9]+,v13([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v14,v[0-9]+,v15([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v16,v[0-9]+,v17([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v18,v[0-9]+,v19([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v20,v[0-9]+,v21([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v22,v[0-9]+,v23([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v24,v[0-9]+,v25([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v26,v[0-9]+,v27([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v28,v[0-9]+,v29([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v30,v[0-9]+,v31([^0-9]|$)} } }
*/
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf4.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf4.c
new file mode 100644
index 00000000000..f7158bcb9d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf4.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e8m1,
+ vint8mf4_t,
+ vint16mf2_t,
+ __riscv_vle8_v_i8mf4,
+ __riscv_vle16_v_i16mf2,
+ __riscv_vwadd_wv_i16mf2,
+ __riscv_vse16_v_i16mf2,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v0,v[0-9]+,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v2,v[0-9]+,v3([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v4,v[0-9]+,v5([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v6,v[0-9]+,v7([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v8,v[0-9]+,v9([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v10,v[0-9]+,v11([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v12,v[0-9]+,v13([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v14,v[0-9]+,v15([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v16,v[0-9]+,v17([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v18,v[0-9]+,v19([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v20,v[0-9]+,v21([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v22,v[0-9]+,v23([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v24,v[0-9]+,v25([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v26,v[0-9]+,v27([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v28,v[0-9]+,v29([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v30,v[0-9]+,v31([^0-9]|$)} } }
*/
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf8.c
new file mode 100644
index 00000000000..2eeb3210d2e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwadd_wv-i8-mf8.c
@@ -0,0 +1,32 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "group_overlap.h"
+
+DEF_GROUP_OVERLAP_BINARY_0(
+ __riscv_vsetvlmax_e8m1,
+ vint8mf8_t,
+ vint16mf4_t,
+ __riscv_vle8_v_i8mf8,
+ __riscv_vle16_v_i16mf4,
+ __riscv_vwadd_wv_i16mf4,
+ __riscv_vse16_v_i16mf4,
+ vwadd_wv,
+ LOOP_WIDEN_BINARY_BODY_X16)
+
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v0,v[0-9]+,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v2,v[0-9]+,v3([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v4,v[0-9]+,v5([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v6,v[0-9]+,v7([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v8,v[0-9]+,v9([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v10,v[0-9]+,v11([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v12,v[0-9]+,v13([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v14,v[0-9]+,v15([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v16,v[0-9]+,v17([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v18,v[0-9]+,v19([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v20,v[0-9]+,v21([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v22,v[0-9]+,v23([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v24,v[0-9]+,v25([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v26,v[0-9]+,v27([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v28,v[0-9]+,v29([^0-9]|$)} } }
*/
+/* { dg-final { scan-assembler-not {vwadd\.wv\s+v30,v[0-9]+,v31([^0-9]|$)} } }
*/
--
2.43.0
