We errorneously commit the recorded base alignment during costing
since the costing refactoring. This causes alignment to be
computed based on a possibly larger vector type than used in the
end.
Bootstrapped and tested on x86_64-unknown-linux-gnu, will push later
today and also backport to branches.
gcc/
PR middle-end/126410
* tree-vect-stmts.cc (vectorizable_store): Only commit to
recorded base alignment when transforming.
(vectorizable_load): Likewise.
gcc/testsuite/
PR middle-end/126410
* gcc.target/i386/pr126410-1a.c: New test.
* gcc.target/i386/pr126410-1b.c: Likewise.
* gcc.target/i386/pr126410-1c.c: Likewise.
* gcc.target/i386/pr126410-2a.c: Likewise.
* gcc.target/i386/pr126410-2b.c: Likewise.
* gcc.target/i386/pr126410-2c.c: Likewise.
* gcc.target/i386/preserve-none-35a.c: Adjust.
* gcc.target/i386/preserve-none-35b.c: Likewise.
* gcc.target/i386/preserve-none-35c.c: Likewise.
* gcc.target/i386/preserve-none-35d.c: Likewise.
* gcc.target/i386/preserve-none-35e.c: Likewise.
* gcc.target/i386/preserve-none-35f.c: Likewise.
* gcc.target/i386/preserve-none-35g.c: Likewise.
Co-Authored-By: Richard Biener <[email protected]>
Signed-off-by: H.J. Lu <[email protected]>
---
gcc/testsuite/gcc.target/i386/pr126410-1a.c | 22 +++++++++++++++++++
gcc/testsuite/gcc.target/i386/pr126410-1b.c | 8 +++++++
gcc/testsuite/gcc.target/i386/pr126410-1c.c | 7 ++++++
gcc/testsuite/gcc.target/i386/pr126410-2a.c | 22 +++++++++++++++++++
gcc/testsuite/gcc.target/i386/pr126410-2b.c | 8 +++++++
gcc/testsuite/gcc.target/i386/pr126410-2c.c | 7 ++++++
.../gcc.target/i386/preserve-none-35a.c | 6 ++---
.../gcc.target/i386/preserve-none-35b.c | 6 ++---
.../gcc.target/i386/preserve-none-35c.c | 6 ++---
.../gcc.target/i386/preserve-none-35d.c | 4 ++--
.../gcc.target/i386/preserve-none-35e.c | 4 ++--
.../gcc.target/i386/preserve-none-35f.c | 4 ++--
.../gcc.target/i386/preserve-none-35g.c | 4 ++--
gcc/tree-vect-stmts.cc | 6 +++--
14 files changed, 95 insertions(+), 19 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr126410-1a.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr126410-1b.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr126410-1c.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr126410-2a.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr126410-2b.c
create mode 100644 gcc/testsuite/gcc.target/i386/pr126410-2c.c
diff --git a/gcc/testsuite/gcc.target/i386/pr126410-1a.c
b/gcc/testsuite/gcc.target/i386/pr126410-1a.c
new file mode 100644
index 00000000000..489064cda6b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-1a.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-64,\[\\t
\]*%\[re\]?sp" } } */
+
+#ifndef N
+#define N 4
+#endif
+
+typedef float vector[N];
+
+extern vector v;
+
+extern void foo (vector *);
+
+void
+func (vector a, vector b)
+{
+ vector r;
+ for (int i = 0; i < N; i++)
+ r[i] = a[i] * b[i];
+ foo (&r);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr126410-1b.c
b/gcc/testsuite/gcc.target/i386/pr126410-1b.c
new file mode 100644
index 00000000000..7e7141eb2e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-1b.c
@@ -0,0 +1,8 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-32,\[\\t \]*%\[re\]?sp"
} } */
+/* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-64,\[\\t
\]*%\[re\]?sp" } } */
+
+#define N 8
+
+#include "pr126410-1a.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr126410-1c.c
b/gcc/testsuite/gcc.target/i386/pr126410-1c.c
new file mode 100644
index 00000000000..8b5fb5bc150
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-1c.c
@@ -0,0 +1,7 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp"
} } */
+
+#define N 16
+
+#include "pr126410-1a.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr126410-2a.c
b/gcc/testsuite/gcc.target/i386/pr126410-2a.c
new file mode 100644
index 00000000000..8bd45573145
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-2a.c
@@ -0,0 +1,22 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-64,\[\\t
\]*%\[re\]?sp" } } */
+
+#ifndef N
+#define N 4
+#endif
+
+typedef struct { float values[N]; } vector;
+
+extern vector v;
+
+extern void foo (vector *);
+
+void
+func (vector a, vector b)
+{
+ vector r;
+ for (int i = 0; i < N; i++)
+ r.values[i] = a.values[i] * b.values[i];
+ foo (&r);
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr126410-2b.c
b/gcc/testsuite/gcc.target/i386/pr126410-2b.c
new file mode 100644
index 00000000000..30743cd73f1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-2b.c
@@ -0,0 +1,8 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-32,\[\\t \]*%\[re\]?sp"
} } */
+/* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-64,\[\\t
\]*%\[re\]?sp" } } */
+
+#define N 8
+
+#include "pr126410-2a.c"
diff --git a/gcc/testsuite/gcc.target/i386/pr126410-2c.c
b/gcc/testsuite/gcc.target/i386/pr126410-2c.c
new file mode 100644
index 00000000000..d618b36e15b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr126410-2c.c
@@ -0,0 +1,7 @@
+/* { dg-do compile { target *-*-linux* } } */
+/* { dg-options "-O2 -march=x86-64-v4 -fomit-frame-pointer" } */
+/* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp"
} } */
+
+#define N 16
+
+#include "pr126410-2a.c"
diff --git a/gcc/testsuite/gcc.target/i386/preserve-none-35a.c
b/gcc/testsuite/gcc.target/i386/preserve-none-35a.c
index 177bf8730e4..71af191e418 100644
--- a/gcc/testsuite/gcc.target/i386/preserve-none-35a.c
+++ b/gcc/testsuite/gcc.target/i386/preserve-none-35a.c
@@ -20,11 +20,11 @@
** movl 64\(%rsp\), %edi
** movq %rsi, 72\(%rsp\)
** movl 72\(%rsp\), %esi
-** movq %rax, 8\(%rsp\)
-** leaq 32\(%rsp\), %rax
** movq %rax, 16\(%rsp\)
+** leaq 32\(%rsp\), %rax
+** movq %rax, 24\(%rsp\)
** xorl %eax, %eax
-** movl \$8, \(%rsp\)
+** movl \$8, 8\(%rsp\)
** call continuation
** addq \$88, %rsp
** .cfi_def_cfa_offset 8
diff --git a/gcc/testsuite/gcc.target/i386/preserve-none-35b.c
b/gcc/testsuite/gcc.target/i386/preserve-none-35b.c
index 76ee7f79c93..61ab8ac5c5f 100644
--- a/gcc/testsuite/gcc.target/i386/preserve-none-35b.c
+++ b/gcc/testsuite/gcc.target/i386/preserve-none-35b.c
@@ -21,11 +21,11 @@
** movl 64\(%rsp\), %edi
** movq %r9, 72\(%rsp\)
** movl 72\(%rsp\), %esi
-** movq %rax, 8\(%rsp\)
-** leaq 32\(%rsp\), %rax
** movq %rax, 16\(%rsp\)
+** leaq 32\(%rsp\), %rax
+** movq %rax, 24\(%rsp\)
** xorl %eax, %eax
-** movl \$8, \(%rsp\)
+** movl \$8, 8\(%rsp\)
** call continuation
** addq \$88, %rsp
** .cfi_def_cfa_offset 8
diff --git a/gcc/testsuite/gcc.target/i386/preserve-none-35c.c
b/gcc/testsuite/gcc.target/i386/preserve-none-35c.c
index 8a307207693..081ffe5eadf 100644
--- a/gcc/testsuite/gcc.target/i386/preserve-none-35c.c
+++ b/gcc/testsuite/gcc.target/i386/preserve-none-35c.c
@@ -20,11 +20,11 @@
** movl 64\(%rsp\), %r8d
** movq %r9, 72\(%rsp\)
** movl 72\(%rsp\), %r9d
-** movq %rax, 8\(%rsp\)
-** leaq 32\(%rsp\), %rax
** movq %rax, 16\(%rsp\)
+** leaq 32\(%rsp\), %rax
+** movq %rax, 24\(%rsp\)
** xorl %eax, %eax
-** movl \$8, \(%rsp\)
+** movl \$8, 8\(%rsp\)
** call continuation
** addq \$88, %rsp
** .cfi_def_cfa_offset 8
diff --git a/gcc/testsuite/gcc.target/i386/preserve-none-35d.c
b/gcc/testsuite/gcc.target/i386/preserve-none-35d.c
index 4a362233587..dd45ad4335c 100644
--- a/gcc/testsuite/gcc.target/i386/preserve-none-35d.c
+++ b/gcc/testsuite/gcc.target/i386/preserve-none-35d.c
@@ -13,9 +13,9 @@
** movq %rdx, 104\(%rsp\)
** movq %r8, 112\(%rsp\)
** movq %r9, 120\(%rsp\)
-** movq \$0, 56\(%rsp\)
** movq \$0, 64\(%rsp\)
-** movq %rax, 48\(%rsp\)
+** movq \$0, 72\(%rsp\)
+** movq %rax, 56\(%rsp\)
** cmpl \$47, %eax
** ja .L2
** leal 8\(%rax\), %edx
diff --git a/gcc/testsuite/gcc.target/i386/preserve-none-35e.c
b/gcc/testsuite/gcc.target/i386/preserve-none-35e.c
index 510281c7a79..98355c59d78 100644
--- a/gcc/testsuite/gcc.target/i386/preserve-none-35e.c
+++ b/gcc/testsuite/gcc.target/i386/preserve-none-35e.c
@@ -13,9 +13,9 @@
** movq %rdx, 104\(%rsp\)
** movq %r8, 112\(%rsp\)
** movq %r9, 120\(%rsp\)
-** movq \$0, 56\(%rsp\)
** movq \$0, 64\(%rsp\)
-** movq %rax, 48\(%rsp\)
+** movq \$0, 72\(%rsp\)
+** movq %rax, 56\(%rsp\)
** cmpl \$47, %eax
** ja .L2
** leal 8\(%rax\), %edx
diff --git a/gcc/testsuite/gcc.target/i386/preserve-none-35f.c
b/gcc/testsuite/gcc.target/i386/preserve-none-35f.c
index 301a357a3cf..6aa8fb64d02 100644
--- a/gcc/testsuite/gcc.target/i386/preserve-none-35f.c
+++ b/gcc/testsuite/gcc.target/i386/preserve-none-35f.c
@@ -13,9 +13,9 @@
** movq %rdx, 104\(%rsp\)
** movq %r8, 112\(%rsp\)
** movq %r9, 120\(%rsp\)
-** movq \$0, 56\(%rsp\)
** movq \$0, 64\(%rsp\)
-** movq %rax, 48\(%rsp\)
+** movq \$0, 72\(%rsp\)
+** movq %rax, 56\(%rsp\)
** cmpl \$47, %eax
** ja .L2
** leal 8\(%rax\), %edx
diff --git a/gcc/testsuite/gcc.target/i386/preserve-none-35g.c
b/gcc/testsuite/gcc.target/i386/preserve-none-35g.c
index 3057456c630..89af519e2a8 100644
--- a/gcc/testsuite/gcc.target/i386/preserve-none-35g.c
+++ b/gcc/testsuite/gcc.target/i386/preserve-none-35g.c
@@ -13,9 +13,9 @@
** movq %rdx, 104\(%rsp\)
** movq %r8, 112\(%rsp\)
** movq %r9, 120\(%rsp\)
-** movq \$0, 56\(%rsp\)
** movq \$0, 64\(%rsp\)
-** movq %rax, 48\(%rsp\)
+** movq \$0, 72\(%rsp\)
+** movq %rax, 56\(%rsp\)
** cmpl \$47, %eax
** ja .L2
** leal 8\(%rax\), %edx
diff --git a/gcc/tree-vect-stmts.cc b/gcc/tree-vect-stmts.cc
index 488b9754bed..c5a86d3a1a4 100644
--- a/gcc/tree-vect-stmts.cc
+++ b/gcc/tree-vect-stmts.cc
@@ -8304,7 +8304,8 @@ vectorizable_store (vec_info *vinfo,
/* Transform. */
- ensure_base_align (dr_info);
+ if (!costing_p)
+ ensure_base_align (dr_info);
if (STMT_VINFO_SIMD_LANE_ACCESS_P (stmt_info) >= 3)
{
@@ -9986,7 +9987,8 @@ vectorizable_load (vec_info *vinfo,
/* Transform. */
dr_vec_info *dr_info = STMT_VINFO_DR_INFO (stmt_info), *first_dr_info = NULL;
- ensure_base_align (dr_info);
+ if (!costing_p)
+ ensure_base_align (dr_info);
if (memory_access_type == VMAT_INVARIANT)
{
--
2.51.0
