Add per-tune integer, floating-point and vector reassociation widths.
Use 2/2/1 for generic-ooo and 3/2/1 for xt-c9501fdvt, while
keeping other tunes at the default width of one.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_tune_param): Add reassociation
widths.
(generic_ooo_tune_info): Set reassociation widths.
(xt_c9501_tune_info): Likewise.
(riscv_reassociation_width): New function.
(TARGET_SCHED_REASSOCIATION_WIDTH): Define.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/reassoc-or-chain.c: New test.
---
gcc/config/riscv/riscv.cc | 26 +++++++++++++++++++
.../gcc.target/riscv/reassoc-or-chain.c | 11 ++++++++
2 files changed, 37 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/riscv/reassoc-or-chain.c
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index a401c0c7c9..a2b4149851 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -300,6 +300,9 @@ struct riscv_tune_param
const char *jump_align;
const char *loop_align;
bool prefer_agnostic;
+ unsigned short int_reassoc_width = 1;
+ unsigned short fp_reassoc_width = 1;
+ unsigned short vec_reassoc_width = 1;
unsigned int small_loop_unroll_ninsns = 4;
unsigned int small_loop_unroll_factor = 2;
};
@@ -665,6 +668,9 @@ static const struct riscv_tune_param generic_ooo_tune_info
= {
NULL, /* jump_align */
NULL, /* loop_align */
true, /* prefer-agnostic. */
+ 2, /* int_reassoc_width. */
+ 2, /* fp_reassoc_width. */
+ 1, /* vec_reassoc_width. */
};
static const common_vector_cost xt_c9501_vls_vector_cost = {
@@ -736,6 +742,9 @@ static const struct riscv_tune_param xt_c9501_tune_info = {
"8", /* jump_align */
"16", /* loop_align */
true, /* prefer-agnostic. */
+ 3, /* int_reassoc_width. */
+ 2, /* fp_reassoc_width. */
+ 1, /* vec_reassoc_width. */
4, /* small_loop_unroll_ninsns. */
8, /* small_loop_unroll_factor. */
};
@@ -11417,6 +11426,20 @@ riscv_issue_rate (void)
return tune_param->issue_rate;
}
+/* Implement TARGET_SCHED_REASSOCIATION_WIDTH. */
+
+static int
+riscv_reassociation_width (tree_code opc ATTRIBUTE_UNUSED, machine_mode mode)
+{
+ if (VECTOR_MODE_P (mode))
+ return tune_param->vec_reassoc_width;
+ if (INTEGRAL_MODE_P (mode))
+ return tune_param->int_reassoc_width;
+ if (FLOAT_MODE_P (mode))
+ return tune_param->fp_reassoc_width;
+ return 1;
+}
+
/* Structure for very basic vector configuration tracking in the scheduler. */
struct last_vconfig
{
@@ -16570,6 +16593,9 @@ riscv_memtag_tag_bitsize ()
#undef TARGET_SCHED_ADJUST_COST
#define TARGET_SCHED_ADJUST_COST riscv_sched_adjust_cost
+#undef TARGET_SCHED_REASSOCIATION_WIDTH
+#define TARGET_SCHED_REASSOCIATION_WIDTH riscv_reassociation_width
+
#undef TARGET_SCHED_CAN_SPECULATE_INSN
#define TARGET_SCHED_CAN_SPECULATE_INSN riscv_sched_can_speculate_insn
diff --git a/gcc/testsuite/gcc.target/riscv/reassoc-or-chain.c
b/gcc/testsuite/gcc.target/riscv/reassoc-or-chain.c
new file mode 100644
index 0000000000..158add3c8d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/reassoc-or-chain.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target { rv64 } } } */
+/* { dg-skip-if "" { *-*-* } { "-flto" } } */
+/* { dg-options "-O3 -march=rv64gc -mabi=lp64d -mtune=generic-ooo
-fdump-tree-reassoc2-details" } */
+
+unsigned long
+or4 (unsigned long a, unsigned long b, unsigned long c, unsigned long d)
+{
+ return a | b | c | d;
+}
+
+/* { dg-final { scan-tree-dump "Width = 2 was chosen" "reassoc2" } } */
--
2.47.1
