On Tue, Aug 18, 2026 at 4:18 PM Richard Biener <[email protected]> wrote:
>
> On Tue, 18 Aug 2026, Jakub Jelinek wrote:
>
> > Hi!
> >
> > I'm seeing various recent FAILs on ia32.
> > +FAIL: gcc.dg/tree-ssa/divmul-mod-1.c (test for excess errors)
> > +FAIL: gcc.dg/tree-ssa/round-up-ior-1.c (test for excess errors)
> > +FAIL: gcc.dg/tree-ssa/vec-mask-zero-1.c (test for excess errors)
> > +FAIL: gcc.dg/tree-ssa/vec-mask-zero-1.c scan-tree-dump-times optimized " 
> > != " 2
> > +FAIL: gcc.dg/tree-ssa/vec-mask-zero-1.c scan-tree-dump-times optimized " & 
> > " 2
> > +FAIL: gcc.dg/tree-ssa/vec-mask-zero-1.c scan-tree-dump-times optimized " 
> > == " 2
> > +FAIL: gcc.dg/tree-ssa/vec-mask-zero-1.c scan-tree-dump-times optimized " 
> > \\\\| " 2
> > +FAIL: gcc.dg/tree-ssa/vector-alignup-1.c (test for excess errors)
> > +FAIL: gcc.dg/tree-ssa/vector-alignup-1.c scan-tree-dump-times optimized " 
> > & " 2
> > +FAIL: gcc.dg/tree-ssa/vector-alignup-1.c scan-tree-dump-times optimized " 
> > \\\\+ " 2
> > +FAIL: g++.dg/tree-ssa/vec-narrow-1.C  -std=gnu++11  scan-tree-dump-not 
> > optimized "vector\\\\(2\\\\) long"
> > +FAIL: g++.dg/tree-ssa/vec-narrow-1.C  -std=gnu++14  scan-tree-dump-not 
> > optimized "vector\\\\(2\\\\) long"
> > +FAIL: g++.dg/tree-ssa/vec-narrow-1.C  -std=gnu++17  scan-tree-dump-not 
> > optimized "vector\\\\(2\\\\) long"
> > +FAIL: g++.dg/tree-ssa/vec-narrow-1.C  -std=gnu++20  scan-tree-dump-not 
> > optimized "vector\\\\(2\\\\) long"
> > +FAIL: g++.dg/tree-ssa/vec-narrow-1.C  -std=gnu++23  scan-tree-dump-not 
> > optimized "vector\\\\(2\\\\) long"
> > +FAIL: g++.dg/tree-ssa/vec-narrow-1.C  -std=gnu++26  scan-tree-dump-not 
> > optimized "vector\\\\(2\\\\) long"
> > +FAIL: g++.dg/tree-ssa/vec-narrow-1.C  -std=gnu++29  scan-tree-dump-not 
> > optimized "vector\\\\(2\\\\) long"
> > +FAIL: g++.dg/tree-ssa/vec-narrow-1.C  -std=gnu++98  scan-tree-dump-not 
> > optimized "vector\\\\(2\\\\) long"
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++11  
> > scan-tree-dump-times optimized "MIN_EXPR" 1
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++11 (test for excess 
> > errors)
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++14  
> > scan-tree-dump-times optimized "MIN_EXPR" 1
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++14 (test for excess 
> > errors)
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++17  
> > scan-tree-dump-times optimized "MIN_EXPR" 1
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++17 (test for excess 
> > errors)
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++20  
> > scan-tree-dump-times optimized "MIN_EXPR" 1
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++20 (test for excess 
> > errors)
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++23  
> > scan-tree-dump-times optimized "MIN_EXPR" 1
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++23 (test for excess 
> > errors)
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++26  
> > scan-tree-dump-times optimized "MIN_EXPR" 1
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++26 (test for excess 
> > errors)
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++29  
> > scan-tree-dump-times optimized "MIN_EXPR" 1
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++29 (test for excess 
> > errors)
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++98  
> > scan-tree-dump-times optimized "MIN_EXPR" 1
> > +FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++98 (test for excess 
> > errors)
> > The following patch fixes the gcc.dg ones and the excess errors in
> > vec-narrow-minmax-2.C.
> > vec-narrow-1.C still fails on ia32, dunno why (added at least -mmmx but it
> > didn't help, unlike x86_64 ia32 doesn't emulate MMX sized vectors in SSE2),
> > and the MIN_EXPR scans fail before/after on both x86_64 and ia32.
> >
> > Tested on x86_64-linux with
> > GXX_TESTSUITE_STDS=98,11,14,17,20,23,26,29 make check-gcc check-g++ 
> > RUNTESTFLAGS="--target_board=unix\{-m64,-m32,-m32/-mno-sse/-mno-mmx\} 
> > tree-ssa.exp='divmul-mod-1.c round-up-ior-1.c vec-mask-zero-1.c 
> > vector-alignup-1.c' dg.exp='vec-narrow-minmax-2.C vec-narrow-1.C'"
> > Ok for trunk?

I still got

FAIL: g++.dg/tree-ssa/vec-narrow-1.C  -std=gnu++20  scan-tree-dump-not
optimized "vector\\(2\\) long"
FAIL: g++.dg/tree-ssa/vec-narrow-1.C  -std=gnu++98  scan-tree-dump-not
optimized "vector\\(2\\) long"
FAIL: g++.dg/tree-ssa/vec-narrow-1.C  -std=gnu++29  scan-tree-dump-not
optimized "vector\\(2\\) long"
FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++20
scan-tree-dump-times optimized "MIN_EXPR" 1
FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++98
scan-tree-dump-times optimized "MIN_EXPR" 1
FAIL: g++.dg/tree-ssa/vec-narrow-minmax-2.C  -std=gnu++29
scan-tree-dump-times optimized "MIN_EXPR" 1

for -m32.

Here is the patch to fix them.

-- 
H.J.
---
128bit vector smaxmin and umaxmin are added to SSE4.  They don't require
AVX512VL nor AVX512DQ.  Also mmx.md has

(define_insn "<code><mode>3"
  [(set (match_operand:MMXMODE14 0 "register_operand" "=Yr,*x,Yv")
    (smaxmin:MMXMODE14
      (match_operand:MMXMODE14 1 "register_operand" "%0,0,Yv")
      (match_operand:MMXMODE14 2 "register_operand" "Yr,*x,Yv")))]
  "TARGET_SSE4_1 && TARGET_MMX_WITH_SSE"
  "@
   p<maxmin_int><mmxvecsize>\t{%2, %0|%0, %2}
   p<maxmin_int><mmxvecsize>\t{%2, %0|%0, %2}
   vp<maxmin_int><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
  [(set_attr "isa" "noavx,noavx,avx")
   (set_attr "type" "sseiadd")
   (set_attr "prefix_extra" "1")
   (set_attr "prefix" "orig,orig,vex")
   (set_attr "mode" "TI")])

(define_insn "<code><mode>3"
  [(set (match_operand:MMXMODE24 0 "register_operand" "=Yr,*x,Yv")
    (umaxmin:MMXMODE24
      (match_operand:MMXMODE24 1 "register_operand" "%0,0,Yv")
      (match_operand:MMXMODE24 2 "register_operand" "Yr,*x,Yv")))]
  "TARGET_SSE4_1 && TARGET_MMX_WITH_SSE"
  "@
   p<maxmin_int><mmxvecsize>\t{%2, %0|%0, %2}
   p<maxmin_int><mmxvecsize>\t{%2, %0|%0, %2}
   vp<maxmin_int><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
  [(set_attr "isa" "noavx,noavx,avx")
   (set_attr "type" "sseiadd")
   (set_attr "prefix_extra" "1")
   (set_attr "prefix" "orig,orig,vex")
   (set_attr "mode" "TI")])

These patterns require TARGET_MMX_WITH_SSE

 #define TARGET_MMX_WITH_SSE     (TARGET_64BIT && TARGET_SSE2)

64-bit vector smaxmin and umaxmin aren't available for ia32 even with
-mmmx.  Compile vec-narrow-1.C and vec-narrow-minmax-2.C with -msse4 and
require int128 for x86.

PR middle-end/126784
* g++.dg/tree-ssa/vec-narrow-1.C: Remove -Wno-psabi.  Add -msse4
and require int128 for x86.
* g++.dg/tree-ssa/vec-narrow-minmax-2.C: Likewise.
From bc20a4a6064d7ddb00926888b47ed7a05663fc06 Mon Sep 17 00:00:00 2001
From: "H.J. Lu" <[email protected]>
Date: Tue, 11 Aug 2026 12:39:54 +0800
Subject: [PATCH] vec-narrow-1.C/vec-narrow-minmax-2.C: Compile with -msse4 and
 require int128

128bit vector smaxmin and umaxmin are added to SSE4.  They don't require
AVX512VL nor AVX512DQ.  Also mmx.md has

(define_insn "<code><mode>3"
  [(set (match_operand:MMXMODE14 0 "register_operand" "=Yr,*x,Yv")
    (smaxmin:MMXMODE14
      (match_operand:MMXMODE14 1 "register_operand" "%0,0,Yv")
      (match_operand:MMXMODE14 2 "register_operand" "Yr,*x,Yv")))]
  "TARGET_SSE4_1 && TARGET_MMX_WITH_SSE"
  "@
   p<maxmin_int><mmxvecsize>\t{%2, %0|%0, %2}
   p<maxmin_int><mmxvecsize>\t{%2, %0|%0, %2}
   vp<maxmin_int><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
  [(set_attr "isa" "noavx,noavx,avx")
   (set_attr "type" "sseiadd")
   (set_attr "prefix_extra" "1")
   (set_attr "prefix" "orig,orig,vex")
   (set_attr "mode" "TI")])

(define_insn "<code><mode>3"
  [(set (match_operand:MMXMODE24 0 "register_operand" "=Yr,*x,Yv")
    (umaxmin:MMXMODE24
      (match_operand:MMXMODE24 1 "register_operand" "%0,0,Yv")
      (match_operand:MMXMODE24 2 "register_operand" "Yr,*x,Yv")))]
  "TARGET_SSE4_1 && TARGET_MMX_WITH_SSE"
  "@
   p<maxmin_int><mmxvecsize>\t{%2, %0|%0, %2}
   p<maxmin_int><mmxvecsize>\t{%2, %0|%0, %2}
   vp<maxmin_int><mmxvecsize>\t{%2, %1, %0|%0, %1, %2}"
  [(set_attr "isa" "noavx,noavx,avx")
   (set_attr "type" "sseiadd")
   (set_attr "prefix_extra" "1")
   (set_attr "prefix" "orig,orig,vex")
   (set_attr "mode" "TI")])

These patterns require TARGET_MMX_WITH_SSE

 #define TARGET_MMX_WITH_SSE     (TARGET_64BIT && TARGET_SSE2)

64-bit vector smaxmin and umaxmin aren't available for ia32 even with
-mmmx.  Compile vec-narrow-1.C and vec-narrow-minmax-2.C with -msse4 and
require int128 for x86.

	PR middle-end/126784
	* g++.dg/tree-ssa/vec-narrow-1.C: Remove -Wno-psabi.  Add -msse4
	and require int128 for x86.
	* g++.dg/tree-ssa/vec-narrow-minmax-2.C: Likewise.

Signed-off-by: H.J. Lu <[email protected]>
---
 gcc/testsuite/g++.dg/tree-ssa/vec-narrow-1.C        | 6 +++---
 gcc/testsuite/g++.dg/tree-ssa/vec-narrow-minmax-2.C | 4 +++-
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/g++.dg/tree-ssa/vec-narrow-1.C b/gcc/testsuite/g++.dg/tree-ssa/vec-narrow-1.C
index 7af11187501..1f863b1d4a2 100644
--- a/gcc/testsuite/g++.dg/tree-ssa/vec-narrow-1.C
+++ b/gcc/testsuite/g++.dg/tree-ssa/vec-narrow-1.C
@@ -1,7 +1,7 @@
 // { dg-do compile }
-// { dg-options "-O2 -fdump-tree-optimized -Wno-psabi" }
-// { dg-additional-options "-mavx512vl -mavx512dq" { target { i?86-*-* x86_64-*-* } } }
-// { dg-additional-options "-mmmx" { target ia32 } }
+// { dg-options "-O2 -fdump-tree-optimized" }
+// { dg-additional-options "-msse4" { target { i?86-*-* x86_64-*-* } } }
+// { dg-require-effective-target int128 { target { i?86-*-* x86_64-*-* } } }
 // Extension is monotone, so it commutes with the comparison and the outer
 // truncation is exact.  The argument is lanewise, so a widened vector
 // MIN/MAX feeding a truncating conversion narrows.
diff --git a/gcc/testsuite/g++.dg/tree-ssa/vec-narrow-minmax-2.C b/gcc/testsuite/g++.dg/tree-ssa/vec-narrow-minmax-2.C
index 74177f7864e..7df25de0942 100644
--- a/gcc/testsuite/g++.dg/tree-ssa/vec-narrow-minmax-2.C
+++ b/gcc/testsuite/g++.dg/tree-ssa/vec-narrow-minmax-2.C
@@ -1,5 +1,7 @@
 // { dg-do compile }
-// { dg-options "-O2 -fdump-tree-optimized -Wno-psabi" }
+// { dg-options "-O2 -fdump-tree-optimized" }
+// { dg-additional-options "-msse4" { target { i?86-*-* x86_64-*-* } } }
+// { dg-require-effective-target int128 { target { i?86-*-* x86_64-*-* } } }
 
 typedef int v2si __attribute__((vector_size (8)));
 typedef long long v2di __attribute__((vector_size (16)));
-- 
2.55.0

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