Compile vect-shiftv[48]qi.c with -mno-ssse3 -mtune=generic to avoid FAIL: gcc.target/i386/vect-shiftv4qi.c scan-assembler-times psllw 2 FAIL: gcc.target/i386/vect-shiftv4qi.c scan-assembler-times psrlw 5 FAIL: gcc.target/i386/vect-shiftv8qi.c scan-assembler-times psllw 2 FAIL: gcc.target/i386/vect-shiftv8qi.c scan-assembler-times psrlw 5
due to SSSE3/SSE4 instructions and different code sequences when SSSE3 is enabled by default and a different default cost mode is in use. PR testsuite/126923 * gcc.target/i386/vect-shiftv4qi.c (dg-options): Replace "-mno-avx2 -mno-avx512vl" with "-mno-ssse3 -mtune=generic". * gcc.target/i386/vect-shiftv8qi.c (dg-options): Likewise. -- H.J.
From f37fa2ad4c356173c583e606148d48a83b264a65 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" <[email protected]> Date: Thu, 20 Aug 2026 10:29:41 +0800 Subject: [PATCH] x86: Compile vect-shiftv[48]qi.c with -mno-ssse3 -mtune=generic Compile vect-shiftv[48]qi.c with -mno-ssse3 -mtune=generic to avoid FAIL: gcc.target/i386/vect-shiftv4qi.c scan-assembler-times psllw 2 FAIL: gcc.target/i386/vect-shiftv4qi.c scan-assembler-times psrlw 5 FAIL: gcc.target/i386/vect-shiftv8qi.c scan-assembler-times psllw 2 FAIL: gcc.target/i386/vect-shiftv8qi.c scan-assembler-times psrlw 5 due to SSSE3/SSE4 instructions and different code sequences when SSSE3 is enabled by default and a different default cost mode is in use. PR testsuite/126923 * gcc.target/i386/vect-shiftv4qi.c (dg-options): Replace "-mno-avx2 -mno-avx512vl" with "-mno-ssse3 -mtune=generic". * gcc.target/i386/vect-shiftv8qi.c (dg-options): Likewise. Signed-off-by: H.J. Lu <[email protected]> --- gcc/testsuite/gcc.target/i386/vect-shiftv4qi.c | 2 +- gcc/testsuite/gcc.target/i386/vect-shiftv8qi.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.target/i386/vect-shiftv4qi.c b/gcc/testsuite/gcc.target/i386/vect-shiftv4qi.c index a5b8ffebc24..8af5df777b3 100644 --- a/gcc/testsuite/gcc.target/i386/vect-shiftv4qi.c +++ b/gcc/testsuite/gcc.target/i386/vect-shiftv4qi.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -msse2 -mno-avx2 -mno-avx512vl" } */ +/* { dg-options "-O2 -msse2 -mno-ssse3 -mtune=generic" } */ /* { dg-additional-options "-fno-PIE" { target ia32 } } */ #define N 4 diff --git a/gcc/testsuite/gcc.target/i386/vect-shiftv8qi.c b/gcc/testsuite/gcc.target/i386/vect-shiftv8qi.c index 3dfcfd28a73..fefbf1e2a03 100644 --- a/gcc/testsuite/gcc.target/i386/vect-shiftv8qi.c +++ b/gcc/testsuite/gcc.target/i386/vect-shiftv8qi.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-O2 -msse2 -mno-avx2 -mno-avx512vl" } */ +/* { dg-options "-O2 -msse2 -mno-ssse3 -mtune=generic" } */ #define N 8 -- 2.55.0
