Port the `vsub` family of NEON intrinsics to the pragma-based framework,
and add assembly tests for every variant.
gcc/ChangeLog:
* config/aarch64/aarch64-neon-builtins-base.cc (vsubh, vsubd,
vsub, vsubq): New function bases.
* config/aarch64/aarch64-neon-builtins-base.def (vsubd, vsub,
vsubq, vsubh): New function declarations.
* config/aarch64/arm_neon.h (vsub_s8, vsub_s16, vsub_s32,
vsub_f32, vsub_f64, vsub_u8, vsub_u16, vsub_u32, vsub_s64,
vsub_u64, vsubq_s8, vsubq_s16, vsubq_s32, vsubq_s64,
vsubq_f32, vsubq_f64, vsubq_u8, vsubq_u16, vsubq_u32,
vsubq_u64, vsub_f16, vsubq_f16): Delete function definitions.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/neon/vsub.c: New test.
---
.../aarch64/aarch64-neon-builtins-base.cc | 5 +
.../aarch64/aarch64-neon-builtins-base.def | 9 +
gcc/config/aarch64/arm_neon.h | 154 ----------------
gcc/testsuite/gcc.target/aarch64/neon/vsub.c | 172 ++++++++++++++++++
4 files changed, 186 insertions(+), 154 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/neon/vsub.c
diff --git a/gcc/config/aarch64/aarch64-neon-builtins-base.cc
b/gcc/config/aarch64/aarch64-neon-builtins-base.cc
index 81511911f0c..9952a85f646 100644
--- a/gcc/config/aarch64/aarch64-neon-builtins-base.cc
+++ b/gcc/config/aarch64/aarch64-neon-builtins-base.cc
@@ -809,6 +809,11 @@ NEON_FUNCTION (vaddd, gimple_arith, (PLUS_EXPR))
NEON_FUNCTION (vadd, gimple_arith, (PLUS_EXPR, PLUS_EXPR, BIT_XOR_EXPR))
NEON_FUNCTION (vaddq, gimple_arith, (PLUS_EXPR, PLUS_EXPR, BIT_XOR_EXPR))
+// Subtraction
+NEON_FUNCTION (vsubd, gimple_arith, (MINUS_EXPR))
+NEON_FUNCTION (vsub, gimple_arith, (MINUS_EXPR))
+NEON_FUNCTION (vsubq, gimple_arith, (MINUS_EXPR))
+
// Bitwise operations
NEON_FUNCTION (vand, gimple_expr, (BIT_AND_EXPR))
NEON_FUNCTION (vandq, gimple_expr, (BIT_AND_EXPR))
diff --git a/gcc/config/aarch64/aarch64-neon-builtins-base.def
b/gcc/config/aarch64/aarch64-neon-builtins-base.def
index e63b98b283b..6d55056ce4e 100644
--- a/gcc/config/aarch64/aarch64-neon-builtins-base.def
+++ b/gcc/config/aarch64/aarch64-neon-builtins-base.def
@@ -71,6 +71,11 @@ DEF_NEON_FUNCTION (vaddq, all_arith_no_fp16, ("Q0,Q0,Q0"))
// Polynomial "addition" (really xor)
DEF_NEON_FUNCTION (vadd, bhd_poly, ("D0,D0,D0"))
DEF_NEON_FUNCTION (vaddq, bhdq_poly, ("Q0,Q0,Q0"))
+
+// Subtraction
+DEF_NEON_FUNCTION (vsubd, d_integer, ("s0,s0,s0"))
+DEF_NEON_FUNCTION (vsub, all_arith_no_fp16, ("D0,D0,D0"))
+DEF_NEON_FUNCTION (vsubq, all_arith_no_fp16, ("Q0,Q0,Q0"))
#undef REQUIRED_EXTENSIONS
// Lanewise arithmetic (FP16)
@@ -78,6 +83,10 @@ DEF_NEON_FUNCTION (vaddq, bhdq_poly, ("Q0,Q0,Q0"))
// Addition
DEF_NEON_FUNCTION (vadd, h_float, ("D0,D0,D0"))
DEF_NEON_FUNCTION (vaddq, h_float, ("Q0,Q0,Q0"))
+
+// Subtraction
+DEF_NEON_FUNCTION (vsub, h_float, ("D0,D0,D0"))
+DEF_NEON_FUNCTION (vsubq, h_float, ("Q0,Q0,Q0"))
#undef REQUIRED_EXTENSIONS
// Bitwise operations
diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index 873a1195d3e..1051b24b5e0 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -763,146 +763,6 @@ vmulq_p8 (poly8x16_t __a, poly8x16_t __b)
return __builtin_aarch64_pmulv16qi_ppp (__a, __b);
}
-__extension__ extern __inline int8x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsub_s8 (int8x8_t __a, int8x8_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline int16x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsub_s16 (int16x4_t __a, int16x4_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline int32x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsub_s32 (int32x2_t __a, int32x2_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline float32x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsub_f32 (float32x2_t __a, float32x2_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline float64x1_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsub_f64 (float64x1_t __a, float64x1_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline uint8x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsub_u8 (uint8x8_t __a, uint8x8_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline uint16x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsub_u16 (uint16x4_t __a, uint16x4_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline uint32x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsub_u32 (uint32x2_t __a, uint32x2_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline int64x1_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsub_s64 (int64x1_t __a, int64x1_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline uint64x1_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsub_u64 (uint64x1_t __a, uint64x1_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsubq_s8 (int8x16_t __a, int8x16_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsubq_s16 (int16x8_t __a, int16x8_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsubq_s32 (int32x4_t __a, int32x4_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline int64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsubq_s64 (int64x2_t __a, int64x2_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsubq_f32 (float32x4_t __a, float32x4_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline float64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsubq_f64 (float64x2_t __a, float64x2_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsubq_u8 (uint8x16_t __a, uint8x16_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsubq_u16 (uint16x8_t __a, uint16x8_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsubq_u32 (uint32x4_t __a, uint32x4_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline uint64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsubq_u64 (uint64x2_t __a, uint64x2_t __b)
-{
- return __a - __b;
-}
-
__extension__ extern __inline int16x8_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vsubl_s8 (int8x8_t __a, int8x8_t __b)
@@ -20541,20 +20401,6 @@ vrsqrtsq_f16 (float16x8_t __a, float16x8_t __b)
return __builtin_aarch64_rsqrtsv8hf (__a, __b);
}
-__extension__ extern __inline float16x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsub_f16 (float16x4_t __a, float16x4_t __b)
-{
- return __a - __b;
-}
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vsubq_f16 (float16x8_t __a, float16x8_t __b)
-{
- return __a - __b;
-}
-
/* ARMv8.2-A FP16 three operands vector intrinsics. */
__extension__ extern __inline float16x4_t
diff --git a/gcc/testsuite/gcc.target/aarch64/neon/vsub.c
b/gcc/testsuite/gcc.target/aarch64/neon/vsub.c
new file mode 100644
index 00000000000..2a0306f6aa7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/neon/vsub.c
@@ -0,0 +1,172 @@
+/* { dg-do compile } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_neon_test.h"
+
+/*
+** test_vsub_u8:
+** sub v0\.8b, v0\.8b, v1\.8b
+** ret
+*/
+TEST_UNIFORM_BINARY (vsub_u8, uint8x8_t)
+
+/*
+** test_vsub_s8:
+** sub v0\.8b, v0\.8b, v1\.8b
+** ret
+*/
+TEST_UNIFORM_BINARY (vsub_s8, int8x8_t)
+
+/*
+** test_vsub_u16:
+** sub v0\.4h, v0\.4h, v1\.4h
+** ret
+*/
+TEST_UNIFORM_BINARY (vsub_u16, uint16x4_t)
+
+/*
+** test_vsub_s16:
+** sub v0\.4h, v0\.4h, v1\.4h
+** ret
+*/
+TEST_UNIFORM_BINARY (vsub_s16, int16x4_t)
+
+/*
+** test_vsub_f16:
+** fsub v0\.4h, v0\.4h, v1\.4h
+** ret
+*/
+TEST_UNIFORM_BINARY (vsub_f16, float16x4_t)
+
+/*
+** test_vsub_u32:
+** sub v0\.2s, v0\.2s, v1\.2s
+** ret
+*/
+TEST_UNIFORM_BINARY (vsub_u32, uint32x2_t)
+
+/*
+** test_vsub_s32:
+** sub v0\.2s, v0\.2s, v1\.2s
+** ret
+*/
+TEST_UNIFORM_BINARY (vsub_s32, int32x2_t)
+
+/*
+** test_vsub_f32:
+** fsub v0\.2s, v0\.2s, v1\.2s
+** ret
+*/
+TEST_UNIFORM_BINARY (vsub_f32, float32x2_t)
+
+/*
+** test_vsub_u64:
+** sub d0, d0, d1
+** ret
+*/
+TEST_UNIFORM_BINARY (vsub_u64, uint64x1_t)
+
+/*
+** test_vsub_s64:
+** sub d0, d0, d1
+** ret
+*/
+TEST_UNIFORM_BINARY (vsub_s64, int64x1_t)
+
+/*
+** test_vsub_f64:
+** fsub d0, d0, d1
+** ret
+*/
+TEST_UNIFORM_BINARY (vsub_f64, float64x1_t)
+
+/*
+** test_vsubq_u8:
+** sub v0\.16b, v0\.16b, v1\.16b
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubq_u8, uint8x16_t)
+
+/*
+** test_vsubq_s8:
+** sub v0\.16b, v0\.16b, v1\.16b
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubq_s8, int8x16_t)
+
+/*
+** test_vsubq_u16:
+** sub v0\.8h, v0\.8h, v1\.8h
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubq_u16, uint16x8_t)
+
+/*
+** test_vsubq_s16:
+** sub v0\.8h, v0\.8h, v1\.8h
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubq_s16, int16x8_t)
+
+/*
+** test_vsubq_f16:
+** fsub v0\.8h, v0\.8h, v1\.8h
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubq_f16, float16x8_t)
+
+/*
+** test_vsubq_u32:
+** sub v0\.4s, v0\.4s, v1\.4s
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubq_u32, uint32x4_t)
+
+/*
+** test_vsubq_s32:
+** sub v0\.4s, v0\.4s, v1\.4s
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubq_s32, int32x4_t)
+
+/*
+** test_vsubq_f32:
+** fsub v0\.4s, v0\.4s, v1\.4s
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubq_f32, float32x4_t)
+
+/*
+** test_vsubq_u64:
+** sub v0\.2d, v0\.2d, v1\.2d
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubq_u64, uint64x2_t)
+
+/*
+** test_vsubq_s64:
+** sub v0\.2d, v0\.2d, v1\.2d
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubq_s64, int64x2_t)
+
+/*
+** test_vsubq_f64:
+** fsub v0\.2d, v0\.2d, v1\.2d
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubq_f64, float64x2_t)
+
+/*
+** test_vsubd_u64:
+** sub x0, x0, x1
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubd_u64, uint64_t)
+
+/*
+** test_vsubd_s64:
+** sub x0, x0, x1
+** ret
+*/
+TEST_UNIFORM_BINARY (vsubd_s64, int64_t)
--
2.51.0
