On 8/19/26 10:45 PM, Surya Kumari Jangala wrote:
>>This optimization is valid only for big endian, and not for little endian.
>> This is because the element numbering within a register is different for
little
>> endian and big endian. So for little endian, we should continue to generate
>>the multiple vcmpne* and other instructions.
>> Since the optimization is only for powerpc64, you will have to add:
>>{ dg-do compile { target { powerpc64-*-* } } }
Hello,
this optimisation is valid for le targets as well the indexing is
already handled in the pattern like:
if (<MODE>mode == V16QImode)
{
if (!BYTES_BIG_ENDIAN)
emit_insn (gen_*vctzlsbb*_<mode> (operands[0], result));
else
emit_insn (gen_*vclzlsbb*_<mode> (operands[0], result));
}
else
{
rtx tmp = gen_reg_rtx (SImode);
if (!BYTES_BIG_ENDIAN)
emit_insn (gen_*vctzlsbb*_<mode> (tmp, result));
else
emit_insn (gen_vclzlsbb_<mode> (tmp, result));
emit_insn (gen_*lshrsi3* (operands[0], tmp, GEN_INT (sh)));
}
DONE;
if i understand correctly.
i have verified the result is same with and without my patch.
the missed punctuation mark i shall add it when the patch is okay for trunk.
Thanks
Vijay.
