This patchset adds support for -mcpu=native and -mtune=native on RISC-V. It comes in three parts:
1. Add the new fields to riscv-cores.def. 2. Record MVENDORID, MARCHID and MIMPID for 6 cores. 3. Implement -mcpu=native and -mtune=native. One detail worth mentioning: on a system whose cores are not all alike, we go with the core the compiler is running on. We could support something like -mcpu=A+B/-mtune=A+B the way ARM/AArch64 does, but there is no precedent for that on RISC-V yet, so I decided to keep this conservative for now. Kito Cheng (3): RISC-V: Give RISCV_CORE a place for the identification registers RISC-V: Add MVENDORID, MARCHID and MIMPID for 6 RISC-V cores RISC-V: Support -mtune=native and -mcpu=native gcc/common/config/riscv/riscv-common.cc | 2 +- gcc/common/config/riscv/riscv-hwprobe.h | 5 + gcc/config/riscv/driver-riscv.cc | 226 ++++++++++++++- gcc/config/riscv/gen-riscv-mcpu-texi.cc | 2 +- gcc/config/riscv/riscv-cores.def | 263 ++++++++++++++---- gcc/config/riscv/riscv.h | 17 +- gcc/config/riscv/x-riscv | 1 + gcc/doc/invoke.texi | 7 + .../gcc.target/riscv/cpunative/native_cpu_0.c | 3 +- .../gcc.target/riscv/cpunative/native_cpu_1.c | 3 +- .../riscv/cpunative/native_cpu_10.c | 17 ++ .../riscv/cpunative/native_cpu_11.c | 16 ++ .../riscv/cpunative/native_cpu_12.c | 15 + .../riscv/cpunative/native_cpu_13.c | 19 ++ .../gcc.target/riscv/cpunative/native_cpu_2.c | 3 +- .../gcc.target/riscv/cpunative/native_cpu_3.c | 7 +- .../gcc.target/riscv/cpunative/native_cpu_4.c | 3 +- .../gcc.target/riscv/cpunative/native_cpu_5.c | 3 +- .../gcc.target/riscv/cpunative/native_cpu_6.c | 3 +- .../gcc.target/riscv/cpunative/native_cpu_7.c | 15 + .../gcc.target/riscv/cpunative/native_cpu_8.c | 16 ++ .../gcc.target/riscv/cpunative/native_cpu_9.c | 15 + .../gcc.target/riscv/march-native-2.c | 12 + .../gcc.target/riscv/march-native-3.c | 13 + .../gcc.target/riscv/march-native-4.c | 14 + 25 files changed, 633 insertions(+), 67 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_10.c create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_11.c create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_12.c create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_13.c create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_7.c create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_8.c create mode 100644 gcc/testsuite/gcc.target/riscv/cpunative/native_cpu_9.c create mode 100644 gcc/testsuite/gcc.target/riscv/march-native-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/march-native-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/march-native-4.c -- 2.53.0
