On Thu, Sep 18, 2025 at 03:25:35PM +0530, jeevitha wrote: > Hi All, > > The following patch has been bootstrapped and regtested on powerpc64le-linux. > > PowerPC vector shift left instructions (vslb, vslh, vslw, vsld) use modulo > semantics for the shift amount. Shifts by (element_bit_width - 1) can be > optimized by replacing the shift amount splat with a vector of 0xFF..FF. On > Power8, this reduces instruction overhead by using vspltis[wd]. > > This patch adds rs6000_optimize_vector_bitwidth_shift to detect splat > constants > of (element_bit_width - 1) and replace them with a vector of all -1s, thereby > avoiding unnecessary memory loads.
Note, I tried out the patch and I did not notice any difference in code generation for the test case for -mcpu=power8, -mcpu=power9, and -mcpu=power10, comparing the un-patched compiler to a patched compiler. Could you check if we still need the patch, and if so, check to see if the patch needs to be adjusted? -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: [email protected]
