On 8/13/26 11:58 PM, Jin Ma wrote:
Recognize supported logical instruction pairs while enforcing their
destination, dependency, and source-count constraints. Reuse the common
ANDI classifier for canonical ANDI and zero-extend RTL forms.
Leave the fusion disabled by default.
gcc/ChangeLog:
* config/riscv/riscv-fusion.cc (riscv_insn_is_logical_type_p): New
function.
(riscv_fuse_logic_logic): Likewise.
(riscv_fusion_table): Add RISCV_FUSE_LOGIC_LOGIC.
* config/riscv/riscv-protos.h (enum riscv_fusion_pairs): Add
RISCV_FUSE_LOGIC_LOGIC.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/fusion-logic-logic.c: New test.
* gcc.target/riscv/fusion-logic-logic-zbkb.c: Likewise.
* gcc.target/riscv/fusion-special-positive-rtl-logic-logic.c:
Likewise.
Signed-off-by: Jin Ma <[email protected]>
Thanks. I'd generally prefer to see more implementation comments to
aid future readers about intent (for example in
riscv_insn_is_logical_type_p). While I was able to pretty quickly
figure out what you were doing, a few comments about the cases you're
handling inline would be helpful.
ie, it looks like you first handle the immediate forms, then the
bit-negated forms (when Zbb is enabled), then there's cases with an
outer bit-not, presumably for (not (xor ...))
So OK once prereqs are approved, but do consider adding some more comments.
jeff
