Hi, On 24/08/26 5:16 PM, Manjunath S Matti wrote: > The register order of the two vector arguments to > __builtin_mma_assemble_pair is endian dependent, but the test passes > them in little-endian order unconditionally. On big endian the > accumulator therefore receives the halves of the vector pair transposed > and the computed matrix product does not match the scalar reference, so > the test aborts with "Error 0,0,0". >
The explanation above is not really correct. The register order of the two vector arguments is not endian dependent. Intuitively, the pair of vsx registers can be considered as a 256-bit value with the even register having bits 0..127 and the odd register having bits 128..255. When the vector pair is stored to memory, we emit stxvp which will store the value in an endian appropriate way. In this testcase, in BE mode, looks like rb[0] holds bits 0..127 while rb[1] holds bits 128..255. So, we have to pass rb[0] first followed by rb[1]. > Swap the two halves on big endian. Tested on powerpc64-linux-gnu > (-m64 and -m32) and powerpc64le-linux-gnu. > > 2026-08-24 Manjunath Matti <[email protected]> > > gcc/testsuite/ > * gcc.target/powerpc/mma-double-test.c (MMA): Swap the vector > arguments to __builtin_mma_assemble_pair on big endian. > > diff --git a/gcc/testsuite/gcc.target/powerpc/mma-double-test.c > b/gcc/testsuite/gcc.target/powerpc/mma-double-test.c > index 254af7f8f79..3ef4da5281f 100644 > --- a/gcc/testsuite/gcc.target/powerpc/mma-double-test.c > +++ b/gcc/testsuite/gcc.target/powerpc/mma-double-test.c > @@ -52,7 +52,13 @@ MMA (int m, int n, int k, double *A, double *B, double *C) > vec_t *rowA = (vec_t *) & AO[i * 16]; > __vector_pair rowB; > vec_t *rb = (vec_t *) & BO[i * 4]; > +/* The register order of __builtin_mma_assemble_pair is endian > + dependent, so the halves must be swapped on big endian. */ > +#ifdef __BIG_ENDIAN__ > + __builtin_mma_assemble_pair (&rowB, rb[0], rb[1]); > +#else The fix is fine. -Surya > __builtin_mma_assemble_pair (&rowB, rb[1], rb[0]); > +#endif > __builtin_mma_xvf64gerpp (&acc0, rowB, rowA[0]); > __builtin_mma_xvf64gerpp (&acc1, rowB, rowA[1]); > __builtin_mma_xvf64gerpp (&acc2, rowB, rowA[2]);
