Using a cast as an lvalue is a GCC extension that clang does not implement. Clang rejects it with -Winvalid-gnu-asm-cast, which is an error by default, so these blocks fail to build with clang.
The casts do nothing. GCC accepts a cast in an asm output only when it
is a no-op, and rejects it with "lvalue required in 'asm' statement"
otherwise, so any code that compiles today already passes an operand of
the right type. GMP's longlong.h dropped these long ago, and so has
libgcrypt's copy.
The Z8000 block is the exception. There W_TYPE_SIZE is 16, so the cast
to unsigned int is not a no-op and GCC would reject it too; that block
has been dead for a long time and is changed here for consistency.
Casts on *input* operands are left alone: those are ordinary rvalue
conversions, and on x86 count_leading_zeros/count_trailing_zeros the
"rm" ((USItype) (x)) cast is what selects the operand width.
Verified with a test unit that instantiates every macro the header
defines, compiled at -O2 with the cross compilers available here:
aarch64, alpha, arm (soft and hard float), hppa 32 and 64, loongarch64,
m68k, mips and mipsel, mips64 n32 and n64 (both endiannesses), powerpc
32 and 64 (both endiannesses), riscv32, riscv64, s390 31-bit and s390x,
sh4 and sh4eb, sparc 32 and 64, and x86 32 and 64. All 29 configurations
produce byte-identical assembly before and after. Of the blocks changed
here, that covers arm, hppa, i386, x86_64, mc68000, mc68020, sh and
sparc; ARC, M32R, m88k, RT/ROMP, sparclite, vax and z8000 have no
compiler here and are changed mechanically.
With clang the same test unit fails to compile before this change and
succeeds after it for x86_64, i386, armv7 and sparcv9. The remaining
targets clang can build were unaffected either way.
include/ChangeLog:
* longlong.h [__arc__, __arm__, __hppa, __i386__, __x86_64__,
__M32R__, __mc68000__, __mc68020__, __m88000__, __ibm032__,
__sh__, __sparc__, __sparc_v8__, __sparc_v9__, __sparclite__,
__vax__, __z8000__]: Drop the casts on asm output operands.
---
include/longlong.h | 194 ++++++++++++++++++++++-----------------------
1 file changed, 97 insertions(+), 97 deletions(-)
diff --git ./include/longlong.h ./include/longlong.h
index 213cbf4948a..f12c90cdc73 100644
--- ./include/longlong.h
+++ ./include/longlong.h
@@ -194,8 +194,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype,
UDItype);
#if defined (__arc__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add.f %1, %4, %5\n\tadc %0, %2, %3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "%r" ((USItype) (ah)), \
"rICal" ((USItype) (bh)), \
"%r" ((USItype) (al)), \
@@ -203,8 +203,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype,
UDItype);
: "cc")
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub.f %1, %4, %5\n\tsbc %0, %2, %3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "r" ((USItype) (ah)), \
"rICal" ((USItype) (bh)), \
"r" ((USItype) (al)), \
@@ -230,16 +230,16 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype,
UDItype);
&& W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("adds %1, %4, %5\n\tadc %0, %2, %3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "%r" ((USItype) (ah)), \
"rI" ((USItype) (bh)), \
"%r" ((USItype) (al)), \
"rI" ((USItype) (bl)) __CLOBBER_CC)
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subs %1, %4, %5\n\tsbc %0, %2, %3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "r" ((USItype) (ah)), \
"rI" ((USItype) (bh)), \
"r" ((USItype) (al)), \
@@ -262,8 +262,8 @@ extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype,
UDItype);
" addcs %0, %0, #65536\n" \
" adds %1, %1, %3, lsl #16\n" \
" adc %0, %0, %3, lsr #16" \
- : "=&r" ((USItype) (xh)), \
- "=r" ((USItype) (xl)), \
+ : "=&r" (xh), \
+ "=r" (xl), \
"=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
: "r" ((USItype) (a)), \
"r" ((USItype) (b)) __CLOBBER_CC ); \
@@ -348,16 +348,16 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__hppa) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add %4,%5,%1\n\taddc %2,%3,%0" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "%rM" ((USItype) (ah)), \
"rM" ((USItype) (bh)), \
"%rM" ((USItype) (al)), \
"rM" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "rM" ((USItype) (ah)), \
"rM" ((USItype) (bh)), \
"rM" ((USItype) (al)), \
@@ -456,30 +456,30 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add{l} {%5,%1|%1,%5}\n\tadc{l} {%3,%0|%0,%3}" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "%0" ((USItype) (ah)), \
"g" ((USItype) (bh)), \
"%1" ((USItype) (al)), \
"g" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub{l} {%5,%1|%1,%5}\n\tsbb{l} {%3,%0|%0,%3}" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "0" ((USItype) (ah)), \
"g" ((USItype) (bh)), \
"1" ((USItype) (al)), \
"g" ((USItype) (bl)))
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("mul{l} %3" \
- : "=a" ((USItype) (w0)), \
- "=d" ((USItype) (w1)) \
+ : "=a" (w0), \
+ "=d" (w1) \
: "%0" ((USItype) (u)), \
"rm" ((USItype) (v)))
#define udiv_qrnnd(q, r, n1, n0, dv) \
__asm__ ("div{l} %4" \
- : "=a" ((USItype) (q)), \
- "=d" ((USItype) (r)) \
+ : "=a" (q), \
+ "=d" (r) \
: "0" ((USItype) (n0)), \
"1" ((USItype) (n1)), \
"rm" ((USItype) (dv)))
@@ -492,30 +492,30 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__x86_64__) && W_TYPE_SIZE == 64
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add{q} {%5,%1|%1,%5}\n\tadc{q} {%3,%0|%0,%3}" \
- : "=r" ((UDItype) (sh)), \
- "=&r" ((UDItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "%0" ((UDItype) (ah)), \
"rme" ((UDItype) (bh)), \
"%1" ((UDItype) (al)), \
"rme" ((UDItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub{q} {%5,%1|%1,%5}\n\tsbb{q} {%3,%0|%0,%3}" \
- : "=r" ((UDItype) (sh)), \
- "=&r" ((UDItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "0" ((UDItype) (ah)), \
"rme" ((UDItype) (bh)), \
"1" ((UDItype) (al)), \
"rme" ((UDItype) (bl)))
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("mul{q} %3" \
- : "=a" ((UDItype) (w0)), \
- "=d" ((UDItype) (w1)) \
+ : "=a" (w0), \
+ "=d" (w1) \
: "%0" ((UDItype) (u)), \
"rm" ((UDItype) (v)))
#define udiv_qrnnd(q, r, n1, n0, dv) \
__asm__ ("div{q} %4" \
- : "=a" ((UDItype) (q)), \
- "=d" ((UDItype) (r)) \
+ : "=a" (q), \
+ "=d" (r) \
: "0" ((UDItype) (n0)), \
"1" ((UDItype) (n1)), \
"rm" ((UDItype) (dv)))
@@ -605,8 +605,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
/* The cmp clears the condition bit. */ \
__asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "0" ((USItype) (ah)), \
"r" ((USItype) (bh)), \
"1" ((USItype) (al)), \
@@ -615,8 +615,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
/* The cmp clears the condition bit. */ \
__asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "0" ((USItype) (ah)), \
"r" ((USItype) (bh)), \
"1" ((USItype) (al)), \
@@ -627,16 +627,16 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__mc68000__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add%.l %5,%1\n\taddx%.l %3,%0" \
- : "=d" ((USItype) (sh)), \
- "=&d" ((USItype) (sl)) \
+ : "=d" (sh), \
+ "=&d" (sl) \
: "%0" ((USItype) (ah)), \
"d" ((USItype) (bh)), \
"%1" ((USItype) (al)), \
"g" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0" \
- : "=d" ((USItype) (sh)), \
- "=&d" ((USItype) (sl)) \
+ : "=d" (sh), \
+ "=&d" (sl) \
: "0" ((USItype) (ah)), \
"d" ((USItype) (bh)), \
"1" ((USItype) (al)), \
@@ -646,23 +646,23 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if (defined (__mc68020__) && !defined (__mc68060__))
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("mulu%.l %3,%1:%0" \
- : "=d" ((USItype) (w0)), \
- "=d" ((USItype) (w1)) \
+ : "=d" (w0), \
+ "=d" (w1) \
: "%0" ((USItype) (u)), \
"dmi" ((USItype) (v)))
#define UMUL_TIME 45
#define udiv_qrnnd(q, r, n1, n0, d) \
__asm__ ("divu%.l %4,%1:%0" \
- : "=d" ((USItype) (q)), \
- "=d" ((USItype) (r)) \
+ : "=d" (q), \
+ "=d" (r) \
: "0" ((USItype) (n0)), \
"1" ((USItype) (n1)), \
"dmi" ((USItype) (d)))
#define UDIV_TIME 90
#define sdiv_qrnnd(q, r, n1, n0, d) \
__asm__ ("divs%.l %4,%1:%0" \
- : "=d" ((USItype) (q)), \
- "=d" ((USItype) (r)) \
+ : "=d" (q), \
+ "=d" (r) \
: "0" ((USItype) (n0)), \
"1" ((USItype) (n1)), \
"dmi" ((USItype) (d)))
@@ -696,8 +696,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
" move%.l %/d2,%1\n" \
" add%.l %/d1,%/d0\n" \
" move%.l %/d0,%0" \
- : "=g" ((USItype) (xh)), \
- "=g" ((USItype) (xl)) \
+ : "=g" (xh), \
+ "=g" (xl) \
: "g" ((USItype) (a)), \
"g" ((USItype) (b)) \
: "d0", "d1", "d2", "d3", "d4")
@@ -732,8 +732,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
" move%.l %/d2,%1\n" \
" add%.l %/d1,%/d0\n" \
" move%.l %/d0,%0" \
- : "=g" ((USItype) (xh)), \
- "=g" ((USItype) (xl)) \
+ : "=g" (xh), \
+ "=g" (xl) \
: "g" ((USItype) (a)), \
"g" ((USItype) (b)) \
: "d0", "d1", "d2", "d3", "d4")
@@ -747,7 +747,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__mc68020__) && !defined (__mcpu32__)
#define count_leading_zeros(count, x) \
__asm__ ("bfffo %1{%b2:%b2},%0" \
- : "=d" ((USItype) (count)) \
+ : "=d" (count) \
: "od" ((USItype) (x)), "n" (0))
/* Some ColdFire architectures have a ff1 instruction supported via
__builtin_clz. */
@@ -760,16 +760,16 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__m88000__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "%rJ" ((USItype) (ah)), \
"rJ" ((USItype) (bh)), \
"%rJ" ((USItype) (al)), \
"rJ" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "rJ" ((USItype) (ah)), \
"rJ" ((USItype) (bh)), \
"rJ" ((USItype) (al)), \
@@ -996,16 +996,16 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("a %1,%5\n\tae %0,%3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "%0" ((USItype) (ah)), \
"r" ((USItype) (bh)), \
"%1" ((USItype) (al)), \
"r" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("s %1,%5\n\tse %0,%3" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "0" ((USItype) (ah)), \
"r" ((USItype) (bh)), \
"1" ((USItype) (al)), \
@@ -1034,8 +1034,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
" m r2,%3\n" \
" cas %0,r2,r0\n" \
" mfs r10,%1" \
- : "=r" ((USItype) (ph)), \
- "=r" ((USItype) (pl)) \
+ : "=r" (ph), \
+ "=r" (pl) \
: "%r" (__m0), \
"r" (__m1) \
: "r2"); \
@@ -1048,12 +1048,12 @@ extern UDItype __umulsidi3 (USItype, USItype);
do { \
if ((x) >= 0x10000)
\
__asm__ ("clz %0,%1" \
- : "=r" ((USItype) (count)) \
+ : "=r" (count) \
: "r" ((USItype) (x) >> 16)); \
else \
{
\
__asm__ ("clz %0,%1" \
- : "=r" ((USItype) (count)) \
+ : "=r" (count) \
: "r" ((USItype) (x)));
\
(count) += 16; \
}
\
@@ -1129,8 +1129,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
#define umul_ppmm(w1, w0, u, v) \
__asm__ ( \
"dmulu.l %2,%3\n\tsts%M1 macl,%1\n\tsts%M0 mach,%0"
\
- : "=r<" ((USItype)(w1)), \
- "=r<" ((USItype)(w0)) \
+ : "=r<" (w1), \
+ "=r<" (w0) \
: "r" ((USItype)(u)), \
"r" ((USItype)(v)) \
: "macl", "mach")
@@ -1201,8 +1201,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
&& W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "%rJ" ((USItype) (ah)), \
"rI" ((USItype) (bh)), \
"%rJ" ((USItype) (al)), \
@@ -1210,8 +1210,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
__CLOBBER_CC)
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0" \
- : "=r" ((USItype) (sh)), \
- "=&r" ((USItype) (sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "rJ" ((USItype) (ah)), \
"rI" ((USItype) (bh)), \
"rJ" ((USItype) (al)), \
@@ -1223,7 +1223,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
register USItype __g1 asm ("g1"); \
__asm__ ("umul\t%2,%3,%1\n\t" \
"srlx\t%1, 32, %0" \
- : "=r" ((USItype) (w1)), \
+ : "=r" (w1), \
"=r" (__g1) \
: "r" ((USItype) (u)), \
"r" ((USItype) (v))); \
@@ -1234,8 +1234,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
"udiv\t%3,%4,%0\n\t" \
"umul\t%0,%4,%1\n\t" \
"sub\t%3,%1,%1" \
- : "=&r" ((USItype) (__q)), \
- "=&r" ((USItype) (__r)) \
+ : "=&r" (__q), \
+ "=&r" (__r) \
: "r" ((USItype) (__n1)), \
"r" ((USItype) (__n0)), \
"r" ((USItype) (__d)))
@@ -1243,14 +1243,14 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__sparc_v8__)
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("umul %2,%3,%1;rd %%y,%0" \
- : "=r" ((USItype) (w1)), \
- "=r" ((USItype) (w0)) \
+ : "=r" (w1), \
+ "=r" (w0) \
: "r" ((USItype) (u)), \
"r" ((USItype) (v)))
#define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
__asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
- : "=&r" ((USItype) (__q)), \
- "=&r" ((USItype) (__r)) \
+ : "=&r" (__q), \
+ "=&r" (__r) \
: "r" ((USItype) (__n1)), \
"r" ((USItype) (__n0)), \
"r" ((USItype) (__d)))
@@ -1260,8 +1260,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
instructions scan (ffs from high bit) and divscc. */
#define umul_ppmm(w1, w0, u, v) \
__asm__ ("umul %2,%3,%1;rd %%y,%0" \
- : "=r" ((USItype) (w1)), \
- "=r" ((USItype) (w0)) \
+ : "=r" (w1), \
+ "=r" (w0) \
: "r" ((USItype) (u)), \
"r" ((USItype) (v)))
#define udiv_qrnnd(q, r, n1, n0, d) \
@@ -1304,8 +1304,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
" bl,a 1f\n" \
" add %1,%4,%1\n" \
"1: ! End of inline udiv_qrnnd" \
- : "=r" ((USItype) (q)), \
- "=r" ((USItype) (r)) \
+ : "=r" (q), \
+ "=r" (r) \
: "r" ((USItype) (n1)), \
"r" ((USItype) (n0)), \
"rI" ((USItype) (d)) \
@@ -1314,7 +1314,7 @@ extern UDItype __umulsidi3 (USItype, USItype);
#define count_leading_zeros(count, x) \
do { \
__asm__ ("scan %1,1,%0" \
- : "=r" ((USItype) (count)) \
+ : "=r" (count) \
: "r" ((USItype) (x))); \
} while (0)
/* Early sparclites return 63 for an argument of 0, but they warn that future
@@ -1364,8 +1364,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
" mulscc %%g1,0,%%g1\n" \
" add %%g1,%%o5,%0\n" \
" rd %%y,%1" \
- : "=r" ((USItype) (w1)), \
- "=r" ((USItype) (w0)) \
+ : "=r" (w1), \
+ "=r" (w0) \
: "%rI" ((USItype) (u)), \
"r" ((USItype) (v))
\
: "g1", "o5" __AND_CLOBBER_CC)
@@ -1397,8 +1397,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
" sub %1,%2,%1\n" \
"3: xnor %0,0,%0\n" \
" ! End of inline udiv_qrnnd" \
- : "=&r" ((USItype) (__q)), \
- "=&r" ((USItype) (__r)) \
+ : "=&r" (__q), \
+ "=&r" (__r) \
: "r" ((USItype) (__d)), \
"1" ((USItype) (__n1)), \
"0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
@@ -1417,8 +1417,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
"add\t%r3,%4,%0\n\t" \
"movcs\t%%xcc, 1, %2\n\t" \
"add\t%0, %2, %0" \
- : "=r" ((UDItype)(sh)), \
- "=&r" ((UDItype)(sl)), \
+ : "=r" (sh), \
+ "=&r" (sl), \
"+r" (__carry) \
: "%rJ" ((UDItype)(ah)), \
"rI" ((UDItype)(bh)), \
@@ -1434,8 +1434,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
"sub\t%r3,%4,%0\n\t" \
"movcs\t%%xcc, 1, %2\n\t" \
"sub\t%0, %2, %0" \
- : "=r" ((UDItype)(sh)), \
- "=&r" ((UDItype)(sl)), \
+ : "=r" (sh), \
+ "=&r" (sl), \
"+r" (__carry) \
: "%rJ" ((UDItype)(ah)), \
"rI" ((UDItype)(bh)), \
@@ -1469,8 +1469,8 @@ extern UDItype __umulsidi3 (USItype, USItype);
"sllx %3,32,%3\n\t" \
"add %1,%3,%1\n\t" \
"add %5,%2,%0" \
- : "=r" ((UDItype)(wh)), \
- "=&r" ((UDItype)(wl)), \
+ : "=r" (wh), \
+ "=&r" (wl), \
"=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4) \
: "r" ((UDItype)(u)), \
"r" ((UDItype)(v)) \
@@ -1483,16 +1483,16 @@ extern UDItype __umulsidi3 (USItype, USItype);
#if defined (__vax__) && W_TYPE_SIZE == 32
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("addl2 %5,%1\n\tadwc %3,%0" \
- : "=g" ((USItype) (sh)), \
- "=&g" ((USItype) (sl)) \
+ : "=g" (sh), \
+ "=&g" (sl) \
: "%0" ((USItype) (ah)), \
"g" ((USItype) (bh)), \
"%1" ((USItype) (al)), \
"g" ((USItype) (bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("subl2 %5,%1\n\tsbwc %3,%0" \
- : "=g" ((USItype) (sh)), \
- "=&g" ((USItype) (sl)) \
+ : "=g" (sh), \
+ "=&g" (sl) \
: "0" ((USItype) (ah)), \
"g" ((USItype) (bh)), \
"1" ((USItype) (al)), \
@@ -1598,16 +1598,16 @@ extern UHItype __stormy16_count_leading_zeros (UHItype);
#if defined (__z8000__) && W_TYPE_SIZE == 16
#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
__asm__ ("add %H1,%H5\n\tadc %H0,%H3"
\
- : "=r" ((unsigned int)(sh)), \
- "=&r" ((unsigned int)(sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "%0" ((unsigned int)(ah)), \
"r" ((unsigned int)(bh)), \
"%1" ((unsigned int)(al)), \
"rQR" ((unsigned int)(bl)))
#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
__asm__ ("sub %H1,%H5\n\tsbc %H0,%H3"
\
- : "=r" ((unsigned int)(sh)), \
- "=&r" ((unsigned int)(sl)) \
+ : "=r" (sh), \
+ "=&r" (sl) \
: "0" ((unsigned int)(ah)), \
"r" ((unsigned int)(bh)), \
"1" ((unsigned int)(al)), \
--
2.54.0
