Hello!
For 32bit targets, there is no guarantee that mxcsr register will be
set up correctly w.r.t. unmasked FP exceptions, so don't use SSE
instructions to generate INVALID and DIVZERO FP exceptions.
2012-10-10 Uros Bizjak <ubiz...@gmail.com>
* config/i386/sfp-exceptions.c (__sfp_handle_exceptions): Emit SSE
instructions for 64bit targets only.
Patch was bootstrapped and regtested on x86_64-pc-linux-gnu {,-m32},
committed to mainline SVN.
Uros.
Index: config/i386/sfp-exceptions.c
===================================================================
--- config/i386/sfp-exceptions.c (revision 192347)
+++ config/i386/sfp-exceptions.c (working copy)
@@ -46,7 +46,7 @@ __sfp_handle_exceptions (int _fex)
if (_fex & FP_EX_INVALID)
{
float f = 0.0f;
-#ifdef __SSE__
+#ifdef __x86_64__
asm volatile ("%vdivss\t{%0, %d0|%d0, %0}" : "+x" (f));
#else
asm volatile ("fdiv\t{%y0, %0|%0, %y0}" : "+t" (f));
@@ -56,7 +56,7 @@ __sfp_handle_exceptions (int _fex)
if (_fex & FP_EX_DIVZERO)
{
float f = 1.0f, g = 0.0f;
-#ifdef __SSE__
+#ifdef __x86_64__
asm volatile ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g));
#else
asm volatile ("fdivs\t%1" : "+t" (f) : "m" (g));
