With -mno-sse2 -mno-mmx -mno-3dnow, TARGET_SSE is still on but both
TARGET_MMX and TARGET_MMX_WITH_SSE (TARGET_64BIT && TARGET_SSE2) are
off, so there is no movv2sf expander even though *vec_concatv2sf_sse
(TARGET_SSE) can still create V2SFmode pseudos.
The !TARGET_SSE2 arm of ix86_expand_vector_init_v4sf materialized the
zero upper half with a raw emit_insn (gen_rtx_SET (...)), which bypasses
the emit_move_insn_1 fallback of moving via the same-sized integer mode,
and so left behind
(set (reg:V2SF 107) (const_vector:V2SF [(const_double:SF 0.0) x2]))
for extract_insn to choke on. Use emit_move_insn instead; the zero then
comes out as a DImode move and the sequence is the xorps/unpcklps/movlhps
one GCC 16 emitted for this case.
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Ready push to trunk.
gcc/ChangeLog:
PR target/127225
* config/i386/i386-expand.cc (ix86_expand_vector_init_v4sf): Use
emit_move_insn rather than a bare SET to materialize the V2SFmode
zero half, as movv2sf may not be available.
gcc/testsuite/ChangeLog:
PR target/127225
* gcc.target/i386/pr127225.c: New test.
---
gcc/config/i386/i386-expand.cc | 5 ++++-
gcc/testsuite/gcc.target/i386/pr127225.c | 19 +++++++++++++++++++
2 files changed, 23 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr127225.c
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 2d250fa57b2..077ce3de9a4 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -19554,7 +19554,10 @@ ix86_expand_vector_init_v4sf (rtx target, rtx *ops)
rtx tmp1 = gen_reg_rtx (V2SFmode);
ix86_expand_vector_init_concat (V2SFmode, tmp1, ops, 2);
rtx tmp2 = gen_reg_rtx (V2SFmode);
- emit_insn (gen_rtx_SET (tmp2, CONST0_RTX (V2SFmode)));
+ /* Without both MMX and TARGET_MMX_WITH_SSE there's no movv2sf,
+ go through emit_move_insn so the zero can be materialized in
+ the corresponding integer mode. */
+ emit_move_insn (tmp2, CONST0_RTX (V2SFmode));
rtx tmp = gen_rtx_VEC_CONCAT (V4SFmode, tmp1, tmp2);
emit_insn (gen_rtx_SET (target, tmp));
}
diff --git a/gcc/testsuite/gcc.target/i386/pr127225.c
b/gcc/testsuite/gcc.target/i386/pr127225.c
new file mode 100644
index 00000000000..ca7b5608d34
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr127225.c
@@ -0,0 +1,19 @@
+/* PR target/127225 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -frounding-math -mno-sse2 -mno-mmx -mno-3dnow" } */
+
+typedef __attribute__((__vector_size__(4 * sizeof(float)))) float V;
+
+V g;
+
+void
+foo ()
+{
+ (V){68380689, 263227704};
+}
+
+void
+bar (float a, float b)
+{
+ g = (V){a, b};
+}
--
2.34.1
