On Wed, Sep 9, 2026 at 8:38 AM Uros Bizjak <[email protected]> wrote: > > On Wed, Sep 9, 2026 at 7:27 AM Sun, Qin <[email protected]> wrote: > > > > This patch fixes a miss-optimization issue. > > > > Pattern `vec_concatv2df` has no alternative accepting a memory operand 1 > > and a non-zero operand 2, but the old condition accepted it with an unclear > > condition `!(MEM_P (operands[1]) && MEM_P (operands[2]))`. > > Therefore, after combine resulted its folding with a MEM operand 1 and a > > REG operand 2, the old condition would wrongly advertise the unencodable > > form. A reload would be needed by LRA, which might result in one more > > instruction. > > To avoid such situations, we should reject MEM as operand 1 in the condition > > unless operand 2 is a CONST 0. > > > > Take this case as an example: > > > > v2df foo3 (double* a, double *b) { return __extension__(v2df) {*b, *a}; } > > > > Before with -O3 -march=znver5, we generated: > > foo3: > > vmovsd (%rdi), %xmm0 > > vmovsd (%rsi), %xmm1 > > vunpcklpd %xmm0, %xmm1, %xmm0 > > ret > > > > By narrowing the condition, now we generate: > > foo3: > > vmovsd (%rdi), %xmm0 > > vmovhpd (%rdi), %xmm0, %xmm0 > > ret > > > > gcc/ChangeLog: > > > > * config/i386/sse.md (vec_concatv2df): Restrict the condition > > to accept only CONST0_RTX as operand 2 when operand 1 is MEM. > > > > gcc/testsuite/ChangeLog: > > > > * gcc.target/i386/vec-concatv2df-1.c: New test. > > OK. > > GCC 16 got it right by chance, because it expanded to: > > 8: r106:DF=[r108:DI] > REG_DEAD r108:DI > 9: r104:V2DF=vec_concat(r106:DF,[r107:DI]) > REG_DEAD r107:DI > REG_DEAD r106:DF > > while mainline expands to: > > 8: r106:DF=[r107:DI] > REG_DEAD r107:DI > 9: r104:V2DF=vec_concat([r108:DI],r106:DF) > REG_DEAD r108:DI > REG_DEAD r106:DF
A follow-up question: there are two similar patterns: "*vec_concatv2sf_sse4_1" "*vec_concatv2si_sse4_1" should this fix be applied to these two as well? Uros.
