On 9/9/26 11:36 AM, John David Anglin wrote:
Tested on hppa-unknown-linux-gnu and hppa64-hp-hpux11.11.
Fixes spill failure report in PR rtl-optimization/127142.
Committed to trunk.
Dave
---
hppa: Reduce r1 register pressure
I have seen a few compiles fail where LRA is unable to find a
register to spill. If we don't need a spill, the best way to
load the high part of a symbolic operand is to use the addil
instruction. It uses register r1 as its destinition operand.
In the best case, the linker can remove unnecessary addil
instructions.
However, when there are multiple symbolic loads in a function,
LRA is sometimes unable to find a register to spill. The
original reload was better at handling r1 register spills.
This change adds an additional alternative using a ldil/addl
sequence which avoids using the r1 register. This is less
costly than spilling r1.
There is one PIC insn that I didn't update. When PIC code is
linked into non PIC executable, the linker needs to change the
PIC register, r19, to the DP register, r27. Currently, GNU ld
only supports doing this with addil instructions.
2026-09-09 John David Anglin <[email protected]>
gcc/ChangeLog:
PR rtl-optimization/127142
* config/pa/pa.md: Add alternatives using ldil/addl
sequence to various insns to load the high part of
a symbolic operand.
It's been eons, but IIRC there were scenarios where the HP linker would
take a DP relative address and make it an absolute address. It was not
an optimization but a correctness thing. The HP linker would't do that
for ldil based addresses. The net is that ldil+addl is not always an
equivalent sequence.
This was probably back in the early gcc2 days, so unlikely you'd find a
discussion of this issue on the lists anywhere. Anyway, the point is,
be careful :-)
jeff
