From: Pan Li <[email protected]>

According to the different-source-EEW rule of spec, for widening
reductions, if
vs2 overlaps vs1, then the instruction is reserved, because the same
vector register supplies operands with different EEWs.

Therefore, add strict constrait to make sure the vs2 will never overlap
vs1.

The below test suites are passed for this patch:
1. The rv64gcv fully regression tests.

Pan Li (3):
  RISC-V: Fix reg overlap for vs1 of the widening integer reduction
  RISC-V: Add test cases for vwredsum.vs reg overlap
  RISC-V: Add test cases for vwredsumu.vs reg overlap

 gcc/config/riscv/constraints.md               | 11 +++
 gcc/config/riscv/riscv-protos.h               |  2 +
 gcc/config/riscv/riscv-v.cc                   | 45 ++++++++++-
 gcc/config/riscv/vector.md                    |  2 +-
 .../rvv/autovec/group_overlap/group_overlap.h | 79 +++++++++++++++++++
 .../group_overlap/vwredsum_vs-i16-m1.c        | 20 +++++
 .../group_overlap/vwredsum_vs-i16-m2.c        | 23 ++++++
 .../group_overlap/vwredsum_vs-i16-m4.c        | 23 ++++++
 .../group_overlap/vwredsum_vs-i16-m8.c        | 23 ++++++
 .../group_overlap/vwredsum_vs-i32-m1.c        | 20 +++++
 .../group_overlap/vwredsum_vs-i32-m2.c        | 23 ++++++
 .../group_overlap/vwredsum_vs-i32-m4.c        | 23 ++++++
 .../group_overlap/vwredsum_vs-i32-m8.c        | 23 ++++++
 .../autovec/group_overlap/vwredsum_vs-i8-m1.c | 20 +++++
 .../autovec/group_overlap/vwredsum_vs-i8-m2.c | 23 ++++++
 .../autovec/group_overlap/vwredsum_vs-i8-m4.c | 23 ++++++
 .../autovec/group_overlap/vwredsum_vs-i8-m8.c | 23 ++++++
 .../group_overlap/vwredsumu_vs-u16-m1.c       | 20 +++++
 .../group_overlap/vwredsumu_vs-u16-m2.c       | 23 ++++++
 .../group_overlap/vwredsumu_vs-u16-m4.c       | 23 ++++++
 .../group_overlap/vwredsumu_vs-u16-m8.c       | 23 ++++++
 .../group_overlap/vwredsumu_vs-u32-m1.c       | 20 +++++
 .../group_overlap/vwredsumu_vs-u32-m2.c       | 23 ++++++
 .../group_overlap/vwredsumu_vs-u32-m4.c       | 23 ++++++
 .../group_overlap/vwredsumu_vs-u32-m8.c       | 23 ++++++
 .../group_overlap/vwredsumu_vs-u8-m1.c        | 20 +++++
 .../group_overlap/vwredsumu_vs-u8-m2.c        | 23 ++++++
 .../group_overlap/vwredsumu_vs-u8-m4.c        | 23 ++++++
 .../group_overlap/vwredsumu_vs-u8-m8.c        | 23 ++++++
 29 files changed, 671 insertions(+), 2 deletions(-)
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i16-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i16-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i16-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i16-m8.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i32-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i32-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i32-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i32-m8.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i8-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i8-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i8-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsum_vs-i8-m8.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u16-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u16-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u16-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u16-m8.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u32-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u32-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u32-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u32-m8.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u8-m1.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u8-m2.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u8-m4.c
 create mode 100644 
gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwredsumu_vs-u8-m8.c

-- 
2.43.0

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