When the "Windowed Register Option" is configured in the Xtensa ISA,
register A0 is reserved for the return address and cannot be used for
other purposes. Therefore, the A0 register should be excluded from
the "preferred reload register" set, ie., the RL_REGS regclass.
gcc/ChangeLog:
* config/xtensa/xtensa.cc (xtensa_conditional_register_usage):
Clear the bit corresponding to the A0 register from the
HARD_REG_SET associated with RL_REGS, if TARGET_WINDOWED_ABI
is enabled.
---
gcc/config/xtensa/xtensa.cc | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
index f4b1151d2e0..b1daa0f0a99 100644
--- a/gcc/config/xtensa/xtensa.cc
+++ b/gcc/config/xtensa/xtensa.cc
@@ -5379,16 +5379,20 @@ xtensa_conditional_register_usage (void)
call_used_regs[i] = !!(call_used_regs[i] & c_mask);
}
- /* Remove hard FP register from the preferred reload registers set. */
- CLEAR_HARD_REG_BIT (reg_class_contents[(int)RL_REGS],
+ /* Remove hard frame pointer from the preferred reload registers set. */
+ CLEAR_HARD_REG_BIT (reg_class_contents[RL_REGS],
HARD_FRAME_POINTER_REGNUM);
- /* Register A0 holds the return address upon entry to a function
- for the CALL0 ABI, but unlike the windowed register ABI, it is
- not reserved for this purpose and may hold other values after
- the return address has been saved. */
+ /* Register A0 holds the return address upon entry to a function for
+ the CALL0 ABI, but unlike the windowed register ABI, it is not
+ reserved for this purpose and may hold other values after the return
+ address has been saved. In a similar vein, register A0 should be
+ excluded from the preferred reload registers set when the windowed
+ register ABI is in effect. */
if (!TARGET_WINDOWED_ABI)
fixed_regs[A0_REG] = 0;
+ else
+ CLEAR_HARD_REG_BIT (reg_class_contents[RL_REGS], A0_REG);
}
/* Map hard register number to register class */
--
2.39.5
