Hello All,

Below patch is bootstrapped and regtested on powerpc64le-linux with no
regressions.

Commit r17-3977-gfb21f1686938d6 introduced aop_optab (any_or_plus) to
allow backends control over choices of PLUS vs. IOR during expansion.
However, this caused a code-generation regression on rs6000 where
bitfield stores (like those in testcase gcc.target/powerpc/20050603-3.c)
were expanded using PLUS instead of logical IOR, preventing optimization
into rlwimi. Additionally, this commit introduced an ICE on bootstrap
during the cse1 pass after adding aop<mode>3 expander in rs6000.md
because simplify-rtx was missing case label for the new AOP RTX code.

This patch resolves both issues by:
1) Defining the direct aop<mode>3 expander for rs6000 to always emit
   logical IOR, restoring the expected code-generation and fixing the
   regression.
2) Adding the case label for AOP in simplify_binary_operation_1 to
   safely prevent the compiler crash.

No new testcase is added since the existing testcase
gcc.target/powerpc/20050603-3.c will work for this.

2026-09-16  Kishan Parmar  <[email protected]>

gcc/ChangeLog:
        PR target/127399
        * config/rs6000/rs6000.md (aop<mode>3): New define_expand to specify
        logical IOR for any_or_plus (AOP) operations on SDI modes.
        * simplify-rtx.cc (simplify_binary_operation_1): Add case AOP to
        safely handle and simplify the new AOP RTX binary code.
---
 gcc/config/rs6000/rs6000.md | 12 ++++++++++++
 gcc/simplify-rtx.cc         |  5 +++++
 2 files changed, 17 insertions(+)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index ddfed3b63bc..ed672b6da02 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -4047,6 +4047,18 @@
     operands[2] = force_reg (<MODE>mode, operands[2]);
 })
 
+;; aop (any_or_plus) a.k.a. pixop. Use IOR on PowerPC.
+(define_expand "aop<mode>3"
+  [(set (match_operand:SDI 0 "gpc_reg_operand")
+       (ior:SDI (match_operand:SDI 1 "gpc_reg_operand")
+                (match_operand:SDI 2 "reg_or_cint_operand")))]
+  ""
+  {
+    emit_insn (gen_ior<mode>3 (operands[0], operands[1], operands[2]));
+    DONE;
+  }
+)
+
 (define_split
   [(set (match_operand:GPR 0 "gpc_reg_operand")
        (iorxor:GPR (match_operand:GPR 1 "gpc_reg_operand")
diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc
index 38c8abfe3e7..c248fbe7253 100644
--- a/gcc/simplify-rtx.cc
+++ b/gcc/simplify-rtx.cc
@@ -5629,6 +5629,11 @@ simplify_ashift:
       }
       return 0;
 
+    case AOP:
+      if (trueop1 == CONST0_RTX (mode))
+       return op0;
+      return 0;
+
     default:
       gcc_unreachable ();
     }
-- 
2.52.0

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