[PATCH] lower-subreg: Don't insist on interesting innermode. [PR127443]

[Robin Dapp]

Hi,

Similar to the outermode, now we have a case where the inner mode is
unsplittable: (subreg:TI (concatn:V2DI ...)).  We don't actually need
it to be splittable so this patch just returns NULL if the size is 
non-constant.

Bootstrapped and regtested on x86, power10, and aarch64.
Regtested on riscv64.

Regards
 Robin

        PR rtl-optimization/127443

gcc/ChangeLog:

        * lower-subreg.cc (simplify_subreg_concatn): Return for
        non-constant inner mode size.

gcc/testsuite/ChangeLog:

        * gcc.target/riscv/rvv/autovec/pr127443.c: New test.
---
 gcc/lower-subreg.cc                                |  8 +++-----
 .../gcc.target/riscv/rvv/autovec/pr127443.c        | 14 ++++++++++++++
 2 files changed, 17 insertions(+), 5 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr127443.c

diff --git a/gcc/lower-subreg.cc b/gcc/lower-subreg.cc
index 548f1b0d4b8..c6b206de8dc 100644
--- a/gcc/lower-subreg.cc
+++ b/gcc/lower-subreg.cc
@@ -666,7 +666,7 @@ decompose_register (unsigned int regno)
 static rtx
 simplify_subreg_concatn (machine_mode outermode, rtx op, poly_uint64 orig_byte)
 {
-  unsigned int outer_size, inner_size, inner_words;
+  unsigned int outer_size, inner_size;
   machine_mode innermode, partmode;
   rtx part;
   unsigned int final_offset;
@@ -674,10 +674,8 @@ simplify_subreg_concatn (machine_mode outermode, rtx op, 
poly_uint64 orig_byte)
 
   innermode = GET_MODE (op);
 
-  if (!interesting_mode_p (innermode, &inner_size, &inner_words))
-    gcc_unreachable ();
-
-  if (!GET_MODE_SIZE (outermode).is_constant (&outer_size))
+  if (!GET_MODE_SIZE (innermode).is_constant (&inner_size)
+      || !GET_MODE_SIZE (outermode).is_constant (&outer_size))
     return NULL_RTX;
 
   /* Must be constant if outer_size is.  */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr127443.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr127443.c
new file mode 100644
index 00000000000..e78c9a2d6a1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/pr127443.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-O -march=rv64gcv -mabi=lp64d -g" } */
+
+typedef __attribute__((__vector_size__(16))) __int128 V;
+typedef __attribute__((__vector_size__(16))) char W;
+
+char c;
+
+void
+foo(V v)
+{
+  v &= c;
+  c = ((W)v)[1];
+}
-- 
2.55.0