On Wed, Sep 23, 2026 at 10:20 AM Kyrylo Tkachov <[email protected]> wrote: > > > > > On 23 Sep 2026, at 10:04, Uros Bizjak <[email protected]> wrote: > > > > On Wed, Sep 23, 2026 at 8:45 AM Hongtao Liu <[email protected]> wrote: > >> > >> On Tue Sep 22, 2026 at 3:07 AM PDT, Uros Bizjak wrote: > >>> On Tue, Sep 22, 2026 at 11:34 AM <[email protected]> wrote: > >>>> > >>>> From: Kyrylo Tkachov <[email protected]> > >>>> > >>>> Different switch tables can reach the same case block. The CET pass > >>>> inserts an ENDBR for each table, although the destination needs only one. > >>>> This also affects dispatches that share a table. > >>>> > >>>> Reuse an existing ENDBR after the destination label. The x86 > >>>> table-sharing > >>>> hook remains disabled. > >>>> > >>>> The regression test has two ordinary tables with eight common > >>>> destinations. > >>>> It emits 17 ENDBR instructions before the fix and 9 after it, in both > >>>> 32-bit and 64-bit code. Both outputs assemble. A 64-bit runtime check > >>>> passes on x86_64. > >>>> > >>>> This patch was written by an AI agent as I'm not familiar enough with > >>>> the x86 internals and can't vouch for it. But if the x86 maintainers > >>>> want it I'm happy to push it. > >>>> > >>>> Assisted-by: OpenAI Codex 5.6 Sol > >>>> > >>>> gcc/ChangeLog: > >>>> > >>>> * config/i386/i386-features.cc > >>>> (rest_of_insert_endbr_and_patchable_area): Reuse an existing > >>>> ENDBR at a switch destination. > >>>> > >>>> gcc/testsuite/ChangeLog: > >>>> > >>>> * gcc.target/i386/cet-switch-4.c: New test. > >>>> > >>>> Cc: Uros Bizjak <[email protected]> > >>>> Signed-off-by: Kyrylo Tkachov <[email protected]> > >>>> --- > >>>> gcc/config/i386/i386-features.cc | 4 ++ > >>>> gcc/testsuite/gcc.target/i386/cet-switch-4.c | 56 ++++++++++++++++++++ > >>>> 2 files changed, 60 insertions(+) > >>>> create mode 100644 gcc/testsuite/gcc.target/i386/cet-switch-4.c > >>>> > >>>> diff --git a/gcc/config/i386/i386-features.cc > >>>> b/gcc/config/i386/i386-features.cc > >>>> index 1d26aa0c336..7c992eadf3c 100644 > >>>> --- a/gcc/config/i386/i386-features.cc > >>>> +++ b/gcc/config/i386/i386-features.cc > >>>> @@ -3274,6 +3274,10 @@ rest_of_insert_endbr_and_patchable_area (bool > >>>> need_endbr, > >>>> dest_blk = e->dest; > >>>> insn = BB_HEAD (dest_blk); > >>>> gcc_assert (LABEL_P (insn)); > >>>> + rtx_insn *next = next_nonnote_nondebug_insn (insn); > >>>> + if (next && INSN_P (next) > >>>> + && recog_memoized (next) == CODE_FOR_nop_endbr) > >>> > >>> The condition should read: > >>> > >>> if (next && NONJUMP_INSN_P (next) > >> NONDEBUG_INSN_P (next)? > > > > next is found with: > > > > rtx_insn *next = next_nonnote_nondebug_insn (insn); > > > > so we are sure we are dealing with nondebug insn. > > > > Can one of the i386 maintainers take this up and push a version you’re happy > with, please?
I'll do it. Thanks, Uros.
