Hi Jeff, On Thu, 2026-09-24 at 07:03 -0600, Jeff Law wrote: > > Something doesn't seem right here. Other targets that use condition > code registers haven't stumbled over this problem yet, so what is it > about sparc that makes it special relative to say the x86? > x86 has no ctrap patterns, so find_cond_trap never fires there.
On sparc ctrap is cmp + t<cond>, so the sequence sets %icc. With
-mcbcond the branch it replaces compares its operands directly without
reading %icc, so a %icc value set in an earlier block can still be live
across TEST_BB and read by a later branch. The cmp then clobbers it.
A value in %icc set in an earlier block can be live across TEST_BB.
That is what the original dumps showed, and it is the condition the
existing helper checks.
>
> For most if-converted code we end up calling end_ifcvt_sequence which
> (among other things) verifies that each generated insn in the
> sequence
> can be recognized and does not clobber CC. Maybe we need to be doing
> something similar for conditional traps. If so, it'd ideally be
> refactored rather than duplicated.
>
Agreed, and there's already a helper on master.
The fix for PR126501 (the same problem with AArch64 CBZ, in the noce
paths) added noce_clobbers_live_cc_p, but find_cond_trap doesnt call
it. I missed it because I developed this against 16.2, which doesn't
have it.
The fix might just be a couple of lines, something like:
if (noce_clobbers_live_cc_p (test_bb, seq))
return false;
in the same place noce_convert_multiple_sets calls it. I'm testing it
on master now and will post a v2 if it checks out.
Thanks for the review,
Stian
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