On Fri, Nov 13, 2026 at 12:45 PM Richard Earnshaw via Sourceware Forge
<[email protected]> wrote:
>
> This patch is in three parts, but the main one is patch 1.
>
> 1. Using something like __builtin_shuffle and picking the same lane for every 
> element is effectively a duplication operation to the result from a single 
> lane.  Allow match.pd to recognize this and simplify it to VEC_DUPLICATE.  
> Note that I added the call to canonicalize_math_after_vectorization_p 
> following initial discussions on this idea with Tamar - he was concerned that 
> a later pass might end up undoing this change if it was run earlier.
> 2. This introduces some parity to the way we treat sub-regs between CSE and 
> combine when handling VEC_SELECT.  Combine will only try to substitute a 
> subreg if the two modes are marked as tieable; the comment argues that doing 
> otherwise can lead to internal errors.  However, CSE and combine's own 
> simplify optimizations will happily try to make the reverse transformation.  
> The result is that combine is unable to reverse the effects of this leading 
> to sub-optimal code.  Rather than risk the issues that combine warns about, 
> I've made the other cases avoid generating a subreg when the modes are not 
> marked tieable - it seems to me that if it is only safe to make the 
> transformation in one direction, then it really should only be safe to make 
> the reverse transformation under the same conditions.

So 1. is more an RTL expansion-level canonicalization where a target
(aarch64 here) might prefer one
form over another?  In particular in 1. you create a BIT_FIELD_REF to
extract the splat element.  If
that's not the first it might require an operation where that plus the
splat is more expensive than
a shuffle and thus require combine?

> 3. Patch 3 is to fix some fallout from the above in the testsuite for 
> aarch64.  Now that we create VEC_DUPLICATE in this way, we need vec_select 
> expanders that can handle SVE partial modes.  The patch generalizes the 
> existing patters to support all SVE vector modes, rather than just the SVE 
> full-vector modes.
>
> The third patch is still a bit of work-in-progress - it passes all the 
> current regression tests, but I haven't (yet) been able to make sure that all 
> the dependent patterns are reached to verify their output.  I'll continue to 
> test that some more next week, but I think in the mean time it's ready for 
> some initial comments.
>
>
> ---
> This is a forge pull request published on the gcc-patches mailing list 
> mailing list
> as requested by Richard Earnshaw via Sourceware Forge 
> <[email protected]>.
> Forge discussion: https://forge.sourceware.org/gcc/gcc/pulls/276
>
> Get it locally using:
> ```
> git fetch forge-upstream 
> "+refs/versioned_pull/276/*:refs/versioned_pull/276/*"
> git switch -c "pr-276-v1" "refs/versioned_pull/276/1/head"
> ```
> Or, download the patch at: https://forge.sourceware.org/gcc/gcc/pulls/276.diff
> Created on: 2026-11-13 11:42:43+00:00
> Latest update: 2026-11-13 11:42:58+00:00
> Changes: 6 changed files, 207 additions, 24 deletions
> Head revision: rearnsha/gcc ref vec-perm-via-dup commit 
> a2fb5027d7449b1fe4674735ba8cf8e365c6d815
> Base revision: gcc/gcc ref trunk commit 
> 4e9ff50d49e07bf9345c925ac69f1c0657f0be9c r17-6186-g4e9ff50d49e07b
> Merge base: 4e9ff50d49e07bf9345c925ac69f1c0657f0be9c
> Requested Reviewers:
>
> Changed files:
> - A: gcc/testsuite/gcc.target/aarch64/sve/vec_lane_1.c
> - M: gcc/combine.cc
> - M: gcc/config/aarch64/aarch64-sve.md
> - M: gcc/config/aarch64/iterators.md
> - M: gcc/cse.cc
> - M: gcc/match.pd
>
> Richard Earnshaw (3):
>   match.pd: simplify vec_perm to vec_duplicate
>   rtl: Only simplify vec_select to subreg if the modes are tieable
>   aarch64: generalize SVE vec_extract for all vector types.
>
>  gcc/combine.cc                                |   6 +-
>  gcc/config/aarch64/aarch64-sve.md             |  34 +++---
>  gcc/config/aarch64/iterators.md               |  58 +++++++++-
>  gcc/cse.cc                                    |   6 +-
>  gcc/match.pd                                  |  24 +++-
>  .../gcc.target/aarch64/sve/vec_lane_1.c       | 103 ++++++++++++++++++
>  6 files changed, 207 insertions(+), 24 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/vec_lane_1.c
>
> --
> 2.56.0
>

Reply via email to