On Tue, Nov 27, 2012 at 8:47 PM, Mike Stump <mikest...@comcast.net> wrote: > On Nov 27, 2012, at 8:51 AM, James Greenhalgh <james.greenha...@arm.com> > wrote: >> In particular, we add support for vectorizing across: >> >> ceil (), ceilf (), lceil (), > >> We add testcases ensuring that each of the expected functions are >> vectorized. As the i386 and rs6000 backends both ostensibly support >> these optimisations we add these tests to the generic testsuites, but >> only wire them up for AArch64. As a target may support any subset of >> these vectorizations we need a check_effective_target macro for >> each of them. >> >> Because of this change to the generic test code I've CCed Janis >> Johnson and Mike Stump. > > Gosh… leaves a bad taste in my mouth. I see why you did it that way… > So, let me just ping folks, anyone see a better way to do this? If no one > admits to having a better solution, I'll approve > it. Let's give them a few days to come up with something concrete, if they > fail, Ok.
If it's any consolation I expect the ARM port to use a subset of these, because in the AArch32 world on v8 we only have the single precision vector variants of these instructions and not the double precision vector variants once we can get hold of the intrinsic decls we need :) . So, if someone's thinking who's going to be a consumer of a subset of these, here's one port that's likely to need this. That doesn't preclude finding a better way of doing this :) regards Ramana
