On 12/05/2012 10:31 PM, Vladimir Makarov wrote:
On 12-12-05 5:51 PM, Michael Meissner wrote:
This is the file that causes the boostrap to fail if
--enable-decimal-float is
used as a configuration option on the LRA branch. You need to
compile this in
32-bit mode with either -mcpu=power7, -mcpu=power6, or -mhard-dfp to
enable the
decimal instructions. I used -m32 -O2 -O3 -mcpu=power6.
I managed to reproduce it. I'll look at this tomorrow.
Thanks, Mike.
The error message is:
/home/meissner/fsf-src/lra/libgcc/dfp-bit.c:248:1: error:
unrecognizable insn:
}
^
(insn 291 25 289 2 (set (reg:DD 199)
(subreg:DD (reg:SD 33 1 [ arg_a ]) 0))
/home/meissner/fsf-src/lra/libgcc/dfp-bit.c:104 -1
(expr_list:REG_DEAD (reg:DI 33 1)
(nil)))
LRA should have change spilled pseudo 199 to memory. LRA did not do
that because the insn is in list of insns used by pseudo 199. This
might happen only when the insn is not recognized.
The following patch fixes the bug.
Committed as rev. 194270.
2012-12-06 Vladimir Makarov <vmaka...@redhat.com>
* rtl.h (SUBREG_MATCH_RELOAD_P): Rename to LRA_SUBREG_P.
* recog.c (register_operand): Check LRA_SUBREG_P.
* lra-constraints.c (match_reload, simplify_operand_subreg): Use
LRA_SUBREG_P.
(emit_spill_move): Set up LRA_SUBREG_P.
Index: lra-constraints.c
===================================================================
--- lra-constraints.c (revision 194263)
+++ lra-constraints.c (working copy)
@@ -685,7 +685,7 @@ match_reload (signed char out, signed ch
new_out_reg = gen_lowpart_SUBREG (outmode, reg);
else
new_out_reg = gen_rtx_SUBREG (outmode, reg, 0);
- SUBREG_MATCH_RELOAD_P (new_out_reg) = 1;
+ LRA_SUBREG_P (new_out_reg) = 1;
/* If the input reg is dying here, we can use the same hard
register for REG and IN_RTX. We do it only for original
pseudos as reload pseudos can die although original
@@ -709,7 +709,7 @@ match_reload (signed char out, signed ch
it at the end of LRA work. */
clobber = emit_clobber (new_out_reg);
LRA_TEMP_CLOBBER_P (PATTERN (clobber)) = 1;
- SUBREG_MATCH_RELOAD_P (new_in_reg) = 1;
+ LRA_SUBREG_P (new_in_reg) = 1;
if (GET_CODE (in_rtx) == SUBREG)
{
rtx subreg_reg = SUBREG_REG (in_rtx);
@@ -842,12 +842,15 @@ static rtx
emit_spill_move (bool to_p, rtx mem_pseudo, rtx val)
{
if (GET_MODE (mem_pseudo) != GET_MODE (val))
- val = gen_rtx_SUBREG (GET_MODE (mem_pseudo),
- GET_CODE (val) == SUBREG ? SUBREG_REG (val) : val,
- 0);
+ {
+ val = gen_rtx_SUBREG (GET_MODE (mem_pseudo),
+ GET_CODE (val) == SUBREG ? SUBREG_REG (val) : val,
+ 0);
+ LRA_SUBREG_P (val) = 1;
+ }
return (to_p
- ? gen_move_insn (mem_pseudo, val)
- : gen_move_insn (val, mem_pseudo));
+ ? gen_move_insn (mem_pseudo, val)
+ : gen_move_insn (val, mem_pseudo));
}
/* Process a special case insn (register move), return true if we
@@ -1193,7 +1196,7 @@ simplify_operand_subreg (int nop, enum m
SUBREG_BYTE (operand), mode) < 0
/* Don't reload subreg for matching reload. It is actually
valid subreg in LRA. */
- && ! SUBREG_MATCH_RELOAD_P (operand))
+ && ! LRA_SUBREG_P (operand))
|| CONSTANT_P (reg) || GET_CODE (reg) == PLUS || MEM_P (reg))
{
enum op_type type = curr_static_id->operand[nop].type;
Index: recog.c
===================================================================
--- recog.c (revision 194263)
+++ recog.c (working copy)
@@ -1067,7 +1067,8 @@ register_operand (rtx op, enum machine_m
&& REGNO (sub) < FIRST_PSEUDO_REGISTER
&& REG_CANNOT_CHANGE_MODE_P (REGNO (sub), GET_MODE (sub), mode)
&& GET_MODE_CLASS (GET_MODE (sub)) != MODE_COMPLEX_INT
- && GET_MODE_CLASS (GET_MODE (sub)) != MODE_COMPLEX_FLOAT)
+ && GET_MODE_CLASS (GET_MODE (sub)) != MODE_COMPLEX_FLOAT
+ && ! LRA_SUBREG_P (op))
return 0;
#endif
Index: rtl.h
===================================================================
--- rtl.h (revision 194263)
+++ rtl.h (working copy)
@@ -268,7 +268,7 @@ struct GTY((chain_next ("RTX_NEXT (&%h)"
In a CODE_LABEL, part of the two-bit alternate entry field.
1 in a CONCAT is VAL_EXPR_IS_COPIED in var-tracking.c.
1 in a VALUE is SP_BASED_VALUE_P in cselib.c.
- 1 in a SUBREG generated by LRA for matching reload. */
+ 1 in a SUBREG generated by LRA for reload insns. */
unsigned int jump : 1;
/* In a CODE_LABEL, part of the two-bit alternate entry field.
1 in a MEM if it cannot trap.
@@ -1416,10 +1416,10 @@ do { \
((RTL_FLAG_CHECK1("SUBREG_PROMOTED_UNSIGNED_P", (RTX), SUBREG)->volatil) \
? -1 : (int) (RTX)->unchanging)
-/* True if the subreg was generated by LRA for matching reload. Such
+/* True if the subreg was generated by LRA for reload insns. Such
subregs are valid only during LRA. */
-#define SUBREG_MATCH_RELOAD_P(RTX) \
- (RTL_FLAG_CHECK1("SUBREG_MATCH_RELOAD_P", (RTX), SUBREG)->jump)
+#define LRA_SUBREG_P(RTX) \
+ (RTL_FLAG_CHECK1("LRA_SUBREG_P", (RTX), SUBREG)->jump)
/* Access various components of an ASM_OPERANDS rtx. */
