On Thu, 2012-11-15 at 13:39 -0800, Andrew Pinski wrote: > > I was posting it for Steve's benefit really. I was in the process of > > updating the patch to the trunk and trying it out there before doing a > > formal submission :). As I found out the testcase needs to be changed > > to work with the new mips target test infrastructure. I will post a > > revised patch with the removal of the internal bug number once I > > finish fixing the testcase itself. > > After fixing up the testcase I find xori still in the resulting code: > gcc$ ./cc1 t.c -O1 -o - -DNOMIPS16= -quiet -mabi=n32 -march=mips64 |grep xor > xori $2,$4,0x1 > > But that is because combine produces: > Trying 34 -> 35: > Failed to match this instruction: > (set (reg:SI 194 [ D.1393 ]) > (if_then_else:SI (xor:SI (reg:SI 200 [ d ]) > (const_int 1 [0x1])) > (reg:SI 6 $6 [ c ]) > (reg:SI 5 $5 [ b ]))) > > But does not switch around the if_then_else as reg 200 has a non zero > bits of just 1. I will look into fix the rest of the problem later > today. So the above patch is a way forward but not the full fix. > > Thanks, > Andrew Pinski
Andrew, are you still planning on submitting this patch? I have been running with your new "*mov<GPR:mode>_on_<GPR2:mode>_ne" instruction and that part at least works fine. I would like to get at least that much checked in for GCC 4.8. Steve Ellcey sell...@mips.com
