On Wed, Jan 30, 2013 at 1:36 PM, Michael Meissner
<meiss...@linux.vnet.ibm.com> wrote:
> This is a series of patches taken from my power8 work meant for inclusion
> against GCC 4.9 when 4.8 is branched, and stage1 of 4.9 opens up again.  They
> could be installed in 4.8 at the discretion of David.
>
> This patch merges together the movsd/movsf patterns, so that when I make
> changes to the basic move patterns, I don't have to remember to do the same
> work in two places.
>
> Along with combining the moves, I added support to use the LFIWZX (power7) and
> STFIWX (power6) instructions to store SDmode variables directly.  Before this,
> we needed to create a wider buffer on the stack, and move the values from
> a register to the buffer, and use a wider load on the floating point side to
> load them up.  Now under power7, it no longer uses this buffer.
>
> A minor other change is that now the compiler will use the VSX XXLXOR
> instruction to clear a single precision floating point value, instead of
> loading the zero value from memory.
>
> I have bootstraped, and there are no regressions with these patches.  Are 
> these
> patches acceptible, so that I can check them in directly when the GCC 4.9 tree
> opens up?
>
> [gcc]
> 2013-01-30  Michael Meissner  <meiss...@linux.vnet.ibm.com>
>
>         * config/rs6000/vector.md (VEC_R): Add 32-bit integer, binary
>         floating point, and decimal floating point to reload iterator.
>
>         * config/rs6000/constraints.md (wl constraint): New constraints to
>         return FLOAT_REGS if certain options are used to reduce the number
>         of separate patterns that exist in the file.
>         (wx constraint): Likewise.
>         (wz constraint): Likewise.
>
>         * config/rs6000/rs6000.c (rs6000_debug_reg_global): If
>         -mdebug=reg, print wg, wl, wx, and wz constraints.
>         (rs6000_init_hard_regno_mode_ok): Initialize new constraints.
>         Initialize the reload functions for 64-bit binary/decimal floating
>         point types.
>         (reg_offset_addressing_ok_p): If we are on a power7 or later, use
>         LFIWZX and STFIWX to load/store 32-bit decimal types, and don't
>         create the buffer on the stack to overcome not having a 32-bit
>         load and store.
>         (rs6000_emit_move): Likewise.
>         (rs6000_secondary_memory_needed_rtx): Likewise.
>         (rs6000_alloc_sdmode_stack_slot): Likewise.
>         (rs6000_preferred_reload_class): On VSX, we can create SFmode 0.0f
>         via xxlxor, just like DFmode 0.0.
>
>         * config/rs6000/rs6000.h (TARGET_NO_SDMODE_STACK): New macro,
>         define as 1 if we are running on a power7 or newer.
>         (enum r6000_reg_class_enum): Add new constraints.
>
>         * config/rs6000/dfp.md (movsd): Delete, combine with binary
>         floating point moves in rs6000.md.  Combine power6x (mfpgpr) moves
>         with other moves by using conditional constraits (wg).  Use LFIWZX
>         and STFIWX for loading SDmode on power7.  Use xxlxor to create
>         0.0f.
>         (movsd splitter): Likewise.
>         (movsd_hardfloat): Likewise.
>         (movsd_softfloat): Likewise.
>
>         * config/rs6000/rs6000.md (FMOVE32): New iterators to combine
>         binary and decimal floating point moves.
>         (fmove_ok): New attributes to combine binary and decimal floating
>         point moves, and to combine power6x (mfpgpr) moves along normal
>         floating moves.
>         (real_value_to_target): Likewise.
>         (f32_lr): Likewise.
>         (f32_lm): Likewise.
>         (f32_li): Likewise.
>         (f32_sr): Likewise.
>         (f32_sm): Likewise.
>         (f32_si): Likewise.
>         (movsf): Combine binary and decimal floating point moves.  Combine
>         power6x (mfpgpr) moves with other moves by using conditional
>         constraits (wg).  Use LFIWZX and STFIWX for loading SDmode on
>         power7.
>         (mov<mode> for SFmode/SDmode); Likewise.
>         (SFmode/SDmode splitters): Likewise.
>         (movsf_hardfloat): Likewise.
>         (mov<mode>_hardfloat for SFmode/SDmode): Likewise.
>         (movsf_softfloat): Likewise.
>         (mov<mode>_softfloat for SFmode/SDmode): Likewise.
>
>         * doc/md.texi (PowerPC and IBM RS6000 constraints): Document wl,
>         wx and wz constraints.
>
> [gcc/testsuite]
> 2013-01-30  Michael Meissner  <meiss...@linux.vnet.ibm.com>
>
>         * gcc.target/powerpc/vsx-float0.c: New testcase.
>         * gcc.target/powerpc/sd-vsx.c: Likewise.
>         * gcc.target/powerpc/sd-pwr6.c: Likewise.

This patch is okay when 4.9 tree opens, but please confirm that the
code paths work correctly for pre-POWER7 systems.

Thanks, David

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