On Mon, Feb 11, 2013 at 9:36 PM, Pat Haugen <pthau...@linux.vnet.ibm.com> wrote: > The following patch fixes the assignment of the insn "type" attribute for > loads and stores. Specifically, it will now appropriately assign update form > and update-indexed form type attributes which allows for better instruction > scheduling by honoring group formation restrictions and (to a lesser extent) > insn latency for the updated address reg. The patch is based on Mike > Meissner's prior 4.9 submissions for move pattern combinations. > > Bootstrap/regtest on powerpc64-linux with no new regressions. Ok for 4.9 > when it opens up? > > > 2013-02-12 Pat Haugen <pthau...@us.ibm.com> > * config/rs6000/predicates.md (indexed_address, update_address_mem > update_indexed_address_mem): New predicates. > * config/rs6000/vsx.md (vsx_extract_<mode>_zero): Set correct "type" > attribute for load/store instructions. > * config/rs6000/dfp.md (movsd_store): Likewise. > (movsd_load): Likewise. > * config/rs6000/rs6000.md (zero_extend<mode>di2_internal1): > Likewise. > (unnamed HI->DI extend define_insn): Likewise. > (unnamed SI->DI extend define_insn): Likewise. > (unnamed QI->SI extend define_insn): Likewise. > (unnamed QI->HI extend define_insn): Likewise. > (unnamed HI->SI extend define_insn): Likewise. > (unnamed HI->SI extend define_insn): Likewise. > (extendsfdf2_fpr): Likewise. > (movsi_internal1): Likewise. > (movsi_internal1_single): Likewise. > (movhi_internal): Likewise. > (movqi_internal): Likewise. > (movcc_internal1): Correct mnemonic for stw insn. Set correct "type" > attribute for load/store instructions. > (mov<mode>_hardfloat): Set correct "type" attribute for load/store > instructions. > (mov<mode>_softfloat): Likewise. > (mov<mode>_hardfloat32): Likewise. > (mov<mode>_hardfloat64): Likewise. > (mov<mode>_softfloat64): Likewise. > (movdi_internal32): Likewise. > (movdi_internal64): Likewise. > (probe_stack_<mode>): Likewise.
This is okay for GCC 4.9, when it opens. Thanks, David
