From: Eric Botcazou <ebotca...@adacore.com> Date: Sun, 14 Apr 2013 10:39:59 +0200
> To my great surprise, this PR shows that the SPARC back-end allows QImode and > HImode values to live in FP registers, but can neither load nor move them. > This can result in an unrecognizable move insn between FP registers or an > illegal fdtox instruction in 64-bit mode as shown by the submitted testcases. > > The attached patch changes that and yields no regressions both in 32-bit and > 64-bit modes. Any objections to applying it to all active branches? No objections. We can actually support this by adding patterns for the partial store instructions, which can store 8-bit and 16-bit quantities from FP registers.
