On 06/08/13 10:04, Richard Earnshaw wrote:
> On 06/08/13 09:48, James Greenhalgh wrote:
>> *Ping*
>>
>> James
>>
>> On Thu, Aug 01, 2013 at 02:50:07PM +0100, Sofiane Naci wrote:
>>> Hi,
>>>
>>> This patch is part of the ongoing work to unify instruction classification
>>> between the ARM and AARCH64 backends.
>>>
>>> This patch fine tunes the ALU/shift type attribute values in the ARM backend
>>> as detailed in the table below:
>>>
>>> Old              New
>>> ----------------------------------------------------------------------
>>> arlo_imm         alu_imm, alus_imm, logic_imm, logics_imm
>>> arlo_reg         adc, adcs, adr, alu_ext, alu_reg, alus_ext, alus_reg,
>>>                  bfm, csel, logic_reg, logics_reg, rev.
> 
> Why arlo_reg into just adc & adcs?  Why not adc_reg and adcs_reg (with
> equivalent changes for arlo_imm?
> 
> Why is adr factored out of arlo_reg rather than arlo_imm?  adr is an add
> immediate using the PC register as a base.
> 
> Finally, please, please, please(!) generate your .md file diffs with gnu
> diff's '-F ^(define' option.  This makes it *much* easier to identify
> which pattern is being modified.
> 
> R.
> 

And another point.  Operations such as alu_ext and csel are
architecturally impossible on pre-v8 cores, so there's no need to
consider them in pre-armv8 pipeline descriptions.

R.
>>> arlo_shift       alu_shift_imm, alus_shift_imm, logic_shift_imm,
>>>                  logics_shift_imm.
>>> arlo_shift_reg   alu_shift_reg, alus_shift_reg, logic_shift_reg,
>>>                  logics_shift_reg.
>>> clz              clz, rbit.
>>> shift            shift_imm (rename).
>>>
>>>
>>> The changes are propagated through the AARCH64 backend, and all the pipeline
>>> descriptions in the ARM backend.
>>>
>>> OK for trunk?
>>>
>>> Thanks
>>> Sofiane
>>>
>>> -----
>>>
>>> ChangeLog:
>>>
>>>     * config/arm/types.md (define_attr "type"): Expand "arlo_imm" into
>>>     "alu_imm", "alus_imm", "logic_imm", "logics_imm".  Expand "arlo_reg"
>>> into
>>>     "adc", "adcs", "adr", "alu_ext", "alu_reg", "alus_ext", "alus_reg",
>>>     "bfm", "csel", "logic_reg", "logics_reg", "rev".  Expand
>>> "arlo_shift" into
>>>     "alu_shift_imm", "alus_shift_imm", "logic_shift_imm",
>>> "logics_shift_imm".
>>>     Expand "arlo_shift_reg" into "alu_shift_reg", "alus_shift_reg",
>>>     "logic_shift_reg", "logics_shift_reg".  Expand "clz" into "clz,
>>> "rbit".
>>>     Rename "shift" to "shift_imm".
>>>     * config/arm/arm.md (define_attr "core_cycles"): Update for
>>> attribute
>>>     changes.
>>>     Update for attribute changes all occurrences of arlo_* and shift*
>>> types.
>>>     * config/arm/arm-fixed.md: Update for attribute changes all
>>> occurrences
>>>     of arlo_* types.
>>>     * config/arm/thumb2.md: Update for attribute changes all occurrences
>>>     of arlo_* types.
>>>     * config/arm/arm.c (xscale_sched_adjust_cost):  (rtx insn, rtx 
>>>     (cortexa7_older_only): Likewise.
>>>     (cortexa7_younger):  Likewise.
>>>     * config/arm/arm1020e.md (1020alu_op): Update for attribute changes.
>>>     (1020alu_shift_op): Likewise.
>>>     (1020alu_shift_reg_op): Likewise.
>>>     * config/arm/arm1026ejs.md (alu_op): Update for attribute changes.
>>>     (alu_shift_op): Likewise.
>>>     (alu_shift_reg_op): Likewise.
>>>     * config/arm/arm1136jfs.md (11_alu_op): Update for attribute
>>> changes.
>>>     (11_alu_shift_op): Likewise.
>>>     (11_alu_shift_reg_op): Likewise.
>>>     * config/arm/arm926ejs.md (9_alu_op): Update for attribute changes.
>>>     (9_alu_shift_reg_op): Likewise.
>>>     * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute
>>> changes.
>>>     (cortex_a15_alu_shift): Likewise.
>>>     (cortex_a15_alu_shift_reg): Likewise.
>>>     * config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute
>>> changes.
>>>     (cortex_a5_alu_shift): Likewise.
>>>     * config/arm/cortex-a53.md (cortex_a53_alu): Update for attribute
>>> changes.
>>>     (cortex_a53_alu_shift): Likewise.
>>>     * config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute
>>>     changes.
>>>     (cortex_a7_alu_reg): Likewise.
>>>     (cortex_a7_alu_shift): Likewise.
>>>     * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute
>>> changes.
>>>     (cortex_a8_alu_shift): Likewise.
>>>     (cortex_a8_alu_shift_reg): Likewise.
>>>     * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute
>>> changes.
>>>     (cortex_a9_dp_shift): Likewise.
>>>     * config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute
>>> changes.
>>>     * config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute
>>> changes.
>>>     (cortex_r4_mov): Likewise.
>>>     (cortex_r4_alu_shift_reg): Likewise.
>>>     * config/arm/fa526.md (526_alu_op): Update for attribute changes.
>>>     (526_alu_shift_op): Likewise.
>>>     * config/arm/fa606te.md (606te_alu_op): Update for attribute
>>> changes.
>>>     * config/arm/fa626te.md (626te_alu_op): Update for attribute
>>> changes.
>>>     (626te_alu_shift_op): Likewise.
>>>     * config/arm/fa726te.md (726te_alu_op): Update for attribute
>>> changes.
>>>     (726te_alu_shift_op): Likewise.
>>>     (726te_alu_shift_reg_op): Likewise.
>>>     * config/arm/fmp626.md (mp626_alu_op): Update for attribute changes.
>>>     (mp626_alu_shift_op): Likewise.
>>>     * config/arm/marvell-pj4.md (pj4_alu): Update for attribute changes.
>>>     (pj4_alu_conds): Likewise.
>>>     (pj4_shift): Likewise.
>>>     (pj4_shift_conds): Likewise.
>>>     (pj4_alu_shift): Likewise.
>>>     (pj4_alu_shift_conds): Likewise.
>>>     * config/aarch64/aarch64.md: Update for attribute change all
>>> occurrences
>>>     of arlo_* and shift* types.
>>
>>
> 
> 
> 


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