On Mon, Sep 9, 2013 at 12:27 PM, Richard Sandiford
<rdsandif...@googlemail.com> wrote:
> Similar to patch 1, but here the calls are involved in a SET instruction
> (or equivalent) and are cases where the operand must have the same mode as
> the SET destination.
>
> Tested in the same way as before. OK to install?
Ok.
Thanks,
Richard.
> Thanks,
> Richard
>
>
> gcc/
> * asan.c (asan_emit_stack_protection): Use gen_int_mode instead of
> GEN_INT.
> * builtins.c (expand_errno_check): Likewise.
> * dwarf2cfi.c (init_return_column_size): Likewise.
> * except.c (sjlj_mark_call_sites): Likewise.
> * expr.c (move_by_pieces_1, store_by_pieces_2): Likewise.
> * lra-constraints.c (emit_inc): Likewise.
> * ree.c (combine_set_extension): Likewise.
> * regmove.c (fixup_match_2): Likewise.
> * reload1.c (inc_for_reload): Likewise.
>
> Index: gcc/asan.c
> ===================================================================
> --- gcc/asan.c 2013-09-09 10:55:59.743537289 +0100
> +++ gcc/asan.c 2013-09-09 11:06:25.029673768 +0100
> @@ -966,15 +966,15 @@ asan_emit_stack_protection (rtx base, HO
> str_cst = asan_pp_string (&asan_pp);
>
> /* Emit the prologue sequence. */
> base = expand_binop (Pmode, add_optab, base,
> gen_int_mode (base_offset, Pmode),
> NULL_RTX, 1, OPTAB_DIRECT);
> mem = gen_rtx_MEM (ptr_mode, base);
> - emit_move_insn (mem, GEN_INT (ASAN_STACK_FRAME_MAGIC));
> + emit_move_insn (mem, gen_int_mode (ASAN_STACK_FRAME_MAGIC, ptr_mode));
> mem = adjust_address (mem, VOIDmode, GET_MODE_SIZE (ptr_mode));
> emit_move_insn (mem, expand_normal (str_cst));
> shadow_base = expand_binop (Pmode, lshr_optab, base,
> GEN_INT (ASAN_SHADOW_SHIFT),
> NULL_RTX, 1, OPTAB_DIRECT);
> shadow_base = expand_binop (Pmode, add_optab, shadow_base,
> gen_int_mode (targetm.asan_shadow_offset (),
> Index: gcc/builtins.c
> ===================================================================
> --- gcc/builtins.c 2013-09-09 10:55:59.747537322 +0100
> +++ gcc/builtins.c 2013-09-09 11:06:25.030673776 +0100
> @@ -1963,15 +1963,16 @@ expand_errno_check (tree exp, rtx target
> {
> #ifdef GEN_ERRNO_RTX
> rtx errno_rtx = GEN_ERRNO_RTX;
> #else
> rtx errno_rtx
> = gen_rtx_MEM (word_mode, gen_rtx_SYMBOL_REF (Pmode, "errno"));
> #endif
> - emit_move_insn (errno_rtx, GEN_INT (TARGET_EDOM));
> + emit_move_insn (errno_rtx,
> + gen_int_mode (TARGET_EDOM, GET_MODE (errno_rtx)));
> emit_label (lab);
> return;
> }
> #endif
>
> /* Make sure the library call isn't expanded as a tail call. */
> CALL_EXPR_TAILCALL (exp) = 0;
> Index: gcc/dwarf2cfi.c
> ===================================================================
> --- gcc/dwarf2cfi.c 2013-09-08 17:18:39.456588227 +0100
> +++ gcc/dwarf2cfi.c 2013-09-09 11:06:25.028673760 +0100
> @@ -242,15 +242,16 @@ expand_builtin_dwarf_sp_column (void)
> which has mode MODE. Initialize column C as a return address column. */
>
> static void
> init_return_column_size (enum machine_mode mode, rtx mem, unsigned int c)
> {
> HOST_WIDE_INT offset = c * GET_MODE_SIZE (mode);
> HOST_WIDE_INT size = GET_MODE_SIZE (Pmode);
> - emit_move_insn (adjust_address (mem, mode, offset), GEN_INT (size));
> + emit_move_insn (adjust_address (mem, mode, offset),
> + gen_int_mode (size, mode));
> }
>
> /* Generate code to initialize the register size table. */
>
> void
> expand_builtin_init_dwarf_reg_sizes (tree address)
> {
> Index: gcc/except.c
> ===================================================================
> --- gcc/except.c 2013-09-08 17:18:39.456588227 +0100
> +++ gcc/except.c 2013-09-09 11:06:25.017673669 +0100
> @@ -1152,15 +1152,15 @@ sjlj_mark_call_sites (void)
> before = insn;
> if (CALL_P (insn))
> before = find_first_parameter_load (insn, NULL_RTX);
>
> start_sequence ();
> mem = adjust_address (crtl->eh.sjlj_fc, TYPE_MODE (integer_type_node),
> sjlj_fc_call_site_ofs);
> - emit_move_insn (mem, GEN_INT (this_call_site));
> + emit_move_insn (mem, gen_int_mode (this_call_site, GET_MODE (mem)));
> p = get_insns ();
> end_sequence ();
>
> emit_insn_before (p, before);
> last_call_site = this_call_site;
> }
> }
> Index: gcc/expr.c
> ===================================================================
> --- gcc/expr.c 2013-09-09 10:55:59.754537379 +0100
> +++ gcc/expr.c 2013-09-09 11:06:25.021673702 +0100
> @@ -1067,34 +1067,40 @@ move_by_pieces_1 (insn_gen_fn genfun, ma
> from1 = adjust_automodify_address (data->from, mode, data->from_addr,
> data->offset);
> else
> from1 = adjust_address (data->from, mode, data->offset);
>
> if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
> emit_insn (gen_add2_insn (data->to_addr,
> - GEN_INT (-(HOST_WIDE_INT)size)));
> + gen_int_mode (-(HOST_WIDE_INT) size,
> + GET_MODE (data->to_addr))));
> if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
> emit_insn (gen_add2_insn (data->from_addr,
> - GEN_INT (-(HOST_WIDE_INT)size)));
> + gen_int_mode (-(HOST_WIDE_INT) size,
> + GET_MODE (data->from_addr))));
>
> if (data->to)
> emit_insn ((*genfun) (to1, from1));
> else
> {
> #ifdef PUSH_ROUNDING
> emit_single_push_insn (mode, from1, NULL);
> #else
> gcc_unreachable ();
> #endif
> }
>
> if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
> - emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
> + emit_insn (gen_add2_insn (data->to_addr,
> + gen_int_mode (size,
> + GET_MODE (data->to_addr))));
> if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
> - emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
> + emit_insn (gen_add2_insn (data->from_addr,
> + gen_int_mode (size,
> + GET_MODE (data->from_addr))));
>
> if (! data->reverse)
> data->offset += size;
>
> data->len -= size;
> }
> }
> @@ -2672,21 +2678,24 @@ store_by_pieces_2 (insn_gen_fn genfun, m
> to1 = adjust_automodify_address (data->to, mode, data->to_addr,
> data->offset);
> else
> to1 = adjust_address (data->to, mode, data->offset);
>
> if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
> emit_insn (gen_add2_insn (data->to_addr,
> - GEN_INT (-(HOST_WIDE_INT) size)));
> + gen_int_mode (-(HOST_WIDE_INT) size,
> + GET_MODE (data->to_addr))));
>
> cst = (*data->constfun) (data->constfundata, data->offset, mode);
> emit_insn ((*genfun) (to1, cst));
>
> if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
> - emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
> + emit_insn (gen_add2_insn (data->to_addr,
> + gen_int_mode (size,
> + GET_MODE (data->to_addr))));
>
> if (! data->reverse)
> data->offset += size;
>
> data->len -= size;
> }
> }
> Index: gcc/lra-constraints.c
> ===================================================================
> --- gcc/lra-constraints.c 2013-09-08 17:18:39.456588227 +0100
> +++ gcc/lra-constraints.c 2013-09-09 11:06:25.023673719 +0100
> @@ -2833,15 +2833,17 @@ emit_inc (enum reg_class new_rclass, rtx
> emit_insn (gen_move_insn (incloc, result));
> /* Restore non-modified value for the result. We prefer this
> way because it does not require an additional hard
> register. */
> if (plus_p)
> {
> if (CONST_INT_P (inc))
> - emit_insn (gen_add2_insn (result, GEN_INT (-INTVAL (inc))));
> + emit_insn (gen_add2_insn (result,
> + gen_int_mode (-INTVAL (inc),
> + GET_MODE (result))));
> else
> emit_insn (gen_sub2_insn (result, inc));
> }
> else
> emit_insn (gen_add2_insn (result, inc));
> }
> return result;
> Index: gcc/ree.c
> ===================================================================
> --- gcc/ree.c 2013-09-08 17:18:39.456588227 +0100
> +++ gcc/ree.c 2013-09-09 11:06:25.023673719 +0100
> @@ -294,15 +294,16 @@ combine_set_extension (ext_cand *cand, r
> new_set = gen_rtx_SET (VOIDmode, new_reg, orig_src);
> else
> {
> /* Zero-extend the negative constant by masking out the bits outside
> the source mode. */
> enum machine_mode src_mode = GET_MODE (SET_DEST (*orig_set));
> rtx new_const_int
> - = GEN_INT (INTVAL (orig_src) & GET_MODE_MASK (src_mode));
> + = gen_int_mode (INTVAL (orig_src) & GET_MODE_MASK (src_mode),
> + GET_MODE (new_reg));
> new_set = gen_rtx_SET (VOIDmode, new_reg, new_const_int);
> }
> }
> else if (GET_MODE (orig_src) == VOIDmode)
> {
> /* This is mostly due to a call insn that should not be optimized. */
> return false;
> Index: gcc/regmove.c
> ===================================================================
> --- gcc/regmove.c 2013-09-08 17:18:39.456588227 +0100
> +++ gcc/regmove.c 2013-09-09 11:06:25.024673727 +0100
> @@ -782,15 +782,16 @@ fixup_match_2 (rtx insn, rtx dst, rtx sr
> if (pset && SET_DEST (pset) == dst
> && GET_CODE (SET_SRC (pset)) == PLUS
> && XEXP (SET_SRC (pset), 0) == src
> && CONST_INT_P (XEXP (SET_SRC (pset), 1)))
> {
> HOST_WIDE_INT newconst
> = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
> - rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
> + rtx add = gen_add3_insn (dst, dst,
> + gen_int_mode (newconst, GET_MODE (dst)));
>
> if (add && validate_change (insn, &PATTERN (insn), add, 0))
> {
> /* Remove the death note for DST from DST_DEATH. */
> if (dst_death)
> {
> remove_death (REGNO (dst), dst_death);
> Index: gcc/reload1.c
> ===================================================================
> --- gcc/reload1.c 2013-09-09 10:49:45.231460860 +0100
> +++ gcc/reload1.c 2013-09-09 11:06:25.027673752 +0100
> @@ -9153,15 +9153,17 @@ inc_for_reload (rtx reloadreg, rtx in, r
> We have already copied IN to RELOADREG. Increment the copy in
> RELOADREG, save that back, then decrement RELOADREG so it has
> the original value. */
>
> emit_insn (gen_add2_insn (reloadreg, inc));
> emit_insn (gen_move_insn (incloc, reloadreg));
> if (CONST_INT_P (inc))
> - emit_insn (gen_add2_insn (reloadreg, GEN_INT (-INTVAL (inc))));
> + emit_insn (gen_add2_insn (reloadreg,
> + gen_int_mode (-INTVAL (inc),
> + GET_MODE (reloadreg))));
> else
> emit_insn (gen_sub2_insn (reloadreg, inc));
> }
> }
>
> #ifdef AUTO_INC_DEC
> static void
