Hi
I noticed that for T32 we don't allow any old register for DImode
values. The restriction of an even register is true only for ARM state
because the ISA doesn't allow any old register in this place. In a few
large .i files that I had knocking about, noticed a nice drop in stack
usage and a generally improved register allocation strategy.
Queued for stage1 after suitable testing including a bootstrap and
regression test in Thumb2 found no issues.
regards
Ramana
<DATE> Ramana Radhakrishnan <ramana.radhakrish...@arm.com>
* config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
restrictions on core registers for DImode values in Thumb2.
--
Ramana Radhakrishnan
Principal Engineer
ARM Ltd.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index b49f43e..73dc04a 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -22593,12 +22593,19 @@ arm_hard_regno_mode_ok (unsigned int regno, enum
machine_mode mode)
}
/* We allow almost any value to be stored in the general registers.
- Restrict doubleword quantities to even register pairs so that we can
- use ldrd. Do not allow very large Neon structure opaque modes in
- general registers; they would use too many. */
+ Restrict doubleword quantities to even register pairs in ARM state
+ so that we can use ldrd. Do not allow very large Neon structure
+ opaque modes in general registers; they would use too many. */
if (regno <= LAST_ARM_REGNUM)
- return !(TARGET_LDRD && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0)
- && ARM_NUM_REGS (mode) <= 4;
+ {
+ if (ARM_NUM_REGS (mode) > 4)
+ return FALSE;
+
+ if (TARGET_THUMB2)
+ return TRUE;
+
+ return !(TARGET_LDRD && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0);
+ }
if (regno == FRAME_POINTER_REGNUM
|| regno == ARG_POINTER_REGNUM)
