Hi all we have merged the gcc-4_9-branch into linaro/gcc-4_9-branch up to revision 213803 as r213943. We have also backported this set of revisions:
r211140 as r213455 [AArch64] Drop ISB after FPCR write. r211270 as r213790 [AArch64] Remove from arm_neon.h functions not in the spec r211271 as r213791 Fix check for __FAST_MATH in arm_neon.h r211273 as r213792 [Patch,testsuite] Fix bind_pic_locally r211275 as r213792 [Patch,testsuite] Fix tests that fail due to symbol visibility when -fPIC r211503 as r213793 [AArch64] fix and enable non-const shuffle for bigendian using TBL instruction r211779 as r213793 [AArch64][committed] Delete unused variable i r212023 as r213794 [AArch64] Fix constraint vec_unpack_trunk r212024 as r213795 [AArch32] Cortex-A5 rtx costs table r212142 as r213796 [AArch32] Handle clz, rbit types in arm pipeline descriptions r212225 as r213797 [AArch64] Fix argument types for some high_lane* intrinsics implemented in assembly r212296 as r213798 [AArch64] Handle fcvta[su] and frint in RTX cost function r212358 as r213799 [AArch64] Relocate saved_varargs_size. r212512 as r213799 [AArch64] Restructure callee save slot allocation logic. r212752 as r213799 Unify slots x29/x30 r212753 as r213799 [AArch64] Add frame_size and hard_fp_offset to machine.frame r212912 as r213799 [AArch64] GNU-Stylize some un-formatted code. r212913 as r213799 [AArch64] Consistent parameter types in prologue/epilogue generation. r212943 as r213799 [AArch64] Remove useless local variable. r212945 as r213799 [AArch64] Remove useless parameter base_rtx. r212946 as r213799 [AArch64] Use register offset in cfun->machine->frame.reg_offset r212947 as r213799 [AArch64] Remove useless variable 'increment' r212949 as r213799 [AArch64] Hoist calculation of register rtx. r212950 as r213799 [AArch64] Refactor code out into aarch64_next_callee_save r212951 as r213799 [AArch64] Use helper functions to handle multiple modes. r212952 as r213799 [AArch64] Unify vector and core register save/restore code. r212954 as r213799 [AArch64] Split save restore path. r212955 as r213799 [AArch64] Simplify prologue expand using new helper functions. r212956 as r213799 [AArch64] Simplify epilogue expansion using new helper functions. r212957 as r213799 [AArch64] Prologue and epilogue test cases. r212958 as r213799 [AArch64] Optimize epilogue in the presence of an outgoing args area. r212959 as r213799 [AArch64] Extend frame state to track WB candidates. r212976 as r213799 [AArch64] Infrastructure for optional use of writeback r212996 as r213799 [AArch64] Optimize prologue when there is no frame pointer. r212997 as r213799 [AArch64] Optimize epilogue when there is no frame r212999 as 213800 [PATCH, ARM] Fix PR61948 (ICE with DImode shift by 1 bit) r213000 as r213801 PR 61713: ICE when expanding single-threaded version of atomic_test_and_set r213376 as r213817 [AArch64][1/2] Remove UNSPEC_CLS and use clrsb RTL code in its' place r213555 as r213817 [AArch64][2/2] Add rtx cost function handling of clz, clrsb, rbit This will be part of our 2014.08 4.9 release. Thanks, Yvan
