On Fri, Aug 29, 2014 at 11:58:37PM -0600, Jeff Law wrote: > One could argue that this mess is a result of trying to optimize a reg > that is set more than once. Though I guess that might be a bit of a > big hammer.
It works fine in other cases, and is quite beneficial for e.g. optimising instruction sequences that set a fixed carry register twice. In the testcase (and comment in the proposed patch), why is combine combining four insns at all? That means it rejected combining just the first three. Why did it do that? Segher
