On 22 September 2014 19:41, Carrot Wei <car...@google.com> wrote: > Hi > > The extended register width in add/adds/sub/subs/cmp instructions is > not always the same as target register, it depends on both target > register width and extension type. But in current implementation the > extended register width is always the same as target register. We have > noticed it can generate following wrong assembler code when compiled > an internal application, > > add x2, x20, x0, sxtw 3 > > The correct assembler should be > > add x2, x20, w0, sxtw 3
Hi, The assembler deliberately accepts the first form as a programmer convenience. Given the above example: AARCH64 GAS x.s page 1 1 0000 82CE20AB adds x2, x20, x0, sxtw 3 2 0004 82CE20AB adds x2, x20, w0, sxtw 3 Note both forms are correctly assembled. The GAS implementation contains code at (or near) tc-aarch64.c:5461 that specifically catches the former. ... therefore I see no need to change the behaviour of gcc. Cheers /Marcus
