On 10 October 2014 11:53, Kyrill Tkachov <kyrylo.tkac...@arm.com> wrote: > Hi all, > > > Some early revisions of the Cortex-A53 have an erratum (835769) whereby > it is possible for a 64-bit multiply-accumulate instruction in > AArch64 state to generate an incorrect result. The details are quite > complex and hard to determine statically, since branches in the code > may exist in some circumstances, but all cases end with a memory > (load, store, or prefetch) instruction followed immediately by the > multiply-accumulate operation. > > The safest work-around for this issue is to make the compiler avoid > emitting multiply-accumulate instructions immediately after memory > instructions and the simplest way to do this is to insert a NOP. A > linker patching technique can also be used, by moving potentially > affected multiply-accumulate instruction into a patch region and > replacing the original instruction with a branch to the patch. > > This patch achieves the compiler part by using the final prescan pass. > The insn length attribute is updated accordingly using ADJUST_INSN_LENGTH > so that conditional branches work properly. > > The fix is disabled by default and can be turned on by the > -mfix-cortex-a53-835769 compiler option. > > I'm attaching a trunk and a 4.9 version of the patch. > The 4.9 version is different only in that rtx_insn* is replaced by rtx. > > Tested on aarch64-none-linux-gnu (and bootstrap with the option) and > built various large benchmarks with it. > > Ok?
OK /Marcus
