Hi, Please have a look at updated patch. 2014-10-22 Petr Murzin <petr.mur...@intel.com>
gcc/
* simplify-rtx.c (simplify_ternary_operation): Simplify
vec_merge (vec_duplicate (vec_select)).
gcc/testsuite/
* gcc.target/i386/extract-insert-combining.c: New.
On Fri, Sep 19, 2014 at 1:43 AM, Jeff Law <l...@redhat.com> wrote:
> On 09/16/14 13:40, Andrew Pinski wrote:
>>
>> On Tue, Sep 16, 2014 at 4:40 AM, Petr Murzin <petrmurz...@gmail.com>
>> wrote:
>>>
>>> Hi,
>>> This patch allows merging of extract and insert. Please have a look.
>>>
>>> 2014-09-16 Petr Murzin <petr.mur...@intel.com>
>>>
>>> * simplify-rtx.c (simplify_ternary_operation): Allow extract and
>>> insert merging.
>>
>>
>> Besides no testcase. Can your changelog mention vectors because I
>> thought from the description you were working on bits.
>
> Similarly :-)
>
> So a few more nits. ChangeLog format is
>
> * file (function): What changed.
>
> So something like
>
> * simplify-rtx.c (simplify_ternary_operation): Simplify
> (vec_merge (vec_duplicate (vec_select ...)) in some cases.
>
>
> + /* Replace (vec_merge (vec_duplicate (vec_select a parallel (0)))
> a 1)
> + with a. */
> + if (GET_CODE (op0) == VEC_DUPLICATE
> + && GET_CODE (XEXP (op0, 0)) == VEC_SELECT
> + && GET_CODE (XEXP (XEXP (op0, 0), 1)) == PARALLEL)
> + {
> + tem = XVECEXP ((XEXP (XEXP (op0, 0), 1)), 0, 0);
> + if (CONST_INT_P (tem) && CONST_INT_P (op2))
> + {
> + if (XEXP (XEXP (op0, 0), 0) == op1 && UINTVAL (tem) == 0
> + && UINTVAL (op2) == 1)
>
> Line break before the first && UINTVAL. ie, format it like this:
>
> if (XEXP (XEXP ...)
> && UINTVAL (tem) == 0
> && UINTVAL (op2) == 1
>
>
> And definitely include a testcase and repost for further review.
>
> Thanks,
> Jeff
extract_insert_patch
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