On 18 November 2014 10:14, David Sherwood <david.sherw...@arm.com> wrote:
> Hi Christophe,
>
> Ah sorry. My mistake - it fixes this in bugzilla:
>
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59810

I did look at that PR, but since it has no testcase attached, I was unsure.
And I am still not :-)
PR 59810 is "[AArch64] LDn/STn implementations are not ABI-conformant
for bigendian."
but the advsimd-intrinsics/vldX.c and vldX_lane.c now PASS with Alan's
patches on aarch64_be, so I thought Alan's patches solve PR59810.

What am I missing?



>
> This change is needed in order to remove the CANNOT_CHANGE_MODE_CLASS
> #define, which will be committed as a separate patch.
>
> Regards,
> David Sherwood.
>
> -----Original Message-----
> From: Christophe Lyon [mailto:christophe.l...@linaro.org]
> Sent: 17 November 2014 21:09
> To: David Sherwood
> Cc: gcc-patches@gcc.gnu.org; Alan Hayward
> Subject: Re: New patch: [AArch64] [BE] [1/2] Make large opaque integer modes 
> endianness-safe.
>
> On 13 November 2014 15:32, David Sherwood <david.sherw...@arm.com> wrote:
>> Hi,
>>
>> I think that's because Alan Hayward's original patch had a bug in it, which 
>> he
>> has fixed and should be submitting to gcc patches fairly soon. So it's 
>> probably
>> best waiting until he gets a new patch up I think.
>>
>
> I've applied both Alan's patches and the advsimd-intrinsics tests now
> all pass on aarch64_be, but this doesn't need your patch.
>
> Which testcase does your patch actually fix?
>
>
>> Regards,
>> David.
>>
>> -----Original Message-----
>> From: Christophe Lyon [mailto:christophe.l...@linaro.org]
>> Sent: 13 November 2014 14:22
>> To: David Sherwood
>> Cc: gcc-patches@gcc.gnu.org
>> Subject: Re: New patch: [AArch64] [BE] [1/2] Make large opaque integer modes 
>> endianness-safe.
>>
>> On 13 November 2014 11:09, David Sherwood <david.sherw...@arm.com> wrote:
>>> Hi All,
>>>
>>> I have successfully rebased this and tested in conjunction with a patch from
>>> Alan Hayward ([AArch64] [BE] Fix vector load/stores to not use ld1/st1), who
>>> should be submitting a new version shortly. Built and tested on:
>>>
>>> aarch64-none-elf
>>> aarch64_be-none-elf
>>> x86_64-linux-gnu
>>
>> I've applied both patches to recent trunk (r217483), and I still see
>> ICEs on aarch64_be, when running the advsimd-intrinsics/vldX.c tests.
>>
>> I have them with Alan Hayward's patch alone, too. BTW, I thought that
>> patch had been approved by Marcus, but it's not in trunk yet. Maybe I
>> missed something.
>>
>> Christophe.
>>
>>>
>>> Regards,
>>> David Sherwood.
>>>
>>> -----Original Message-----
>>> From: David Sherwood [mailto:david.sherw...@arm.com]
>>> Sent: 28 October 2014 08:55
>>> To: 'gcc-patches@gcc.gnu.org'
>>> Subject: RE: [AArch64] [BE] [1/2] Make large opaque integer modes 
>>> endianness-safe.
>>>
>>> Hi,
>>>
>>> Sorry to bother you again. Could someone take a look at this change
>>> please if they have time?
>>>
>>> Thanks!
>>> David.
>>>
>>> -----Original Message-----
>>> From: David Sherwood [mailto:david.sherw...@arm.com]
>>> Sent: 10 October 2014 15:48
>>> To: gcc-patches@gcc.gnu.org
>>> Subject: [AArch64] [BE] [1/2] Make large opaque integer modes 
>>> endianness-safe.
>>>
>>> Hi,
>>>
>>> I have a fix (originally written by Tejas Belagod) for the following bug:
>>>
>>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59810
>>>
>>> Could someone take a look please?
>>>
>>> Thanks!
>>> David Sherwood.
>>>
>>> ChangeLog:
>>>
>>>     gcc/:
>>>     2014-11-13  David Sherwood  <david.sherw...@arm.com>
>>>
>>>         * config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_rglist,
>>>         aarch64_reverse_mask): New decls.
>>>         * config/aarch64/iterators.md (UNSPEC_REV_REGLIST): New enum.
>>>         * config/aarch64/iterators.md (insn_count): New mode_attr.
>>>        * config/aarch64/aarch64-simd.md (vec_store_lanes(o/c/x)i,
>>>         vec_load_lanes(o/c/x)i): Fixed to work for Big Endian.
>>>         * config/aarch64/aarch64-simd.md (aarch64_rev_reglist,
>>>         aarch64_simd_(ld/st)(2/3/4)): Added.
>>>         * config/aarch64/aarch64.c (aarch64_simd_attr_length_rglist,
>>>         aarch64_reverse_mask): Added.
>>
>>
>>
>>
>
>
>
>

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