Richard,
This patch fixes PR63718, which currently breaks Thumb1 bootstrap.
The problem is that in Thumb1 mode, we emit the epilogue in RTL, but the last
insn - epilogue_insns - does not accurately model the corresponding insns
emitted in the asm file. F.i., the asm file may contain an insn:
...
pop {r0}
....
while the corresponding RTL pattern looks like this:
...
(jump_insn (unspec_volatile [
(return)
] VUNSPEC_EPILOGUE))
...
As a consequence, the epilogue may clobber registers without fuse-caller-save
being able to analyze that.
Adding the missing clobbers to epilogue_insns is not trivial, and probably not a
good idea for stage3. The patch works around the problem by disabling
fuse-caller-save in Thumb1 mode.
Build and reg-tested on arm-none-eabi.
OK for stage3?
Thanks,
- Tom
2014-11-20 Tom de Vries <t...@codesourcery.com>
PR rtl-optimization/63718
* config/arm/arm.c (arm_option_override): Disable fuse-caller-save for
Thumb1.
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c (revision 217730)
+++ gcc/config/arm/arm.c (working copy)
@@ -3105,6 +3105,18 @@ arm_option_override (void)
&& (!arm_arch7 || !current_tune->prefer_ldrd_strd))
flag_schedule_fusion = 0;
+ /* In Thumb1 mode, we emit the epilogue in RTL, but the last insn
+ - epilogue_insns - does not accurately model the corresponding insns
+ emitted in the asm file. In particular, see the comment in thumb_exit
+ 'Find out how many of the (return) argument registers we can corrupt'.
+ As a consequence, the epilogue may clobber registers without
+ fuse-caller-save finding out about it. Therefore, disable fuse-caller-save
+ in Thumb1 mode.
+ TODO: Accurately model clobbers for epilogue_insns and reenable
+ fuse-caller-save. */
+ if (TARGET_THUMB1)
+ flag_use_caller_save = 0;
+
/* Register global variables with the garbage collector. */
arm_add_gc_roots ();
}
