> You'll need to rebase over Alan Lawrance's patch. > https://gcc.gnu.org/ml/gcc-patches/2014-12/msg00279.html
Yes, see my new patch: https://gcc.gnu.org/ml/gcc-patches/2014-12/msg00750.html > > +;; Pairwise Integer Max/Min operations. > > +(define_insn "aarch64_<maxmin_uns>p<mode>" > > + [(set (match_operand:VQ_S 0 "register_operand" "=w") > > + (unspec:VQ_S [(match_operand:VQ_S 1 "register_operand" "w") > > + (match_operand:VQ_S 2 "register_operand" "w")] > > + MAXMINV))] > > + "TARGET_SIMD" > > + "<maxmin_uns_op>p\t%0.<Vtype>, %1.<Vtype>, %2.<Vtype>" > > + [(set_attr "type" "neon_minmax<q>")] > > +) > > + > > Could you roll aarch64_reduc_<maxmin_uns>_internalv2si into this pattern? Will come up with another patch to fix this. Thanks for pointing this out. > > Thanks, > Tejas.
