Hi, We find that the committed patch is not correctly generated from our local branch. This caused some code necessary for the testcases missing. As pointed out by Christophe in https://gcc.gnu.org/ml/gcc-patches/2014-12/msg00778.html, we need to rework the testcases so that it can work for AArch32 target too.
This patch fix this two issues. Three changes:
1. vfma_f32, vfmaq_f32, vfms_f32, vfmsq_f32 are only available for arm*-*-*
target with the FMA feature, we take care of this through the macro
__ARM_FEATURE_FMA.
2. vfma_n_f32 and vfmaq_n_f32 are only available for aarch64 target, we take
care of this through the macro __aarch64__.
3. vfmaq_f64, vfmaq_n_f64 and vfmsq_f64 are only available for aarch64
target, we just exclude test for them to keep the testcases clean. (Note: They
also pass on aarch64 & aarch64_be target and we can add test for them if
needed).
Tested on armeb-linux-gnueabi, arm-linux-gnueabi, aarch64-linux-gnu and
aarch64_be-linux-gnu. OK for the trunk?
Sorry if this cause you guys any trouble, we will be more carefull in our
future work.
Index: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfma_n.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfma_n.c
(revision 218582)
+++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfma_n.c
(working copy)
@@ -2,35 +2,34 @@
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
+#ifdef __aarch64__
/* Expected results. */
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x4438ca3d, 0x44390a3d };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x44869eb8, 0x4486beb8, 0x4486deb8,
0x4486feb8 };
-VECT_VAR_DECL(expected,hfloat,64,2) [] = { 0x408906e1532b8520,
0x40890ee1532b8520 };
#define VECT_VAR_ASSIGN(S,Q,T1,W) S##Q##_##T1##W
#define ASSIGN(S, Q, T, W, V) T##W##_t S##Q##_##T##W = V
-#define TEST_MSG "VFMA/VFMAQ"
+#define TEST_MSG "VFMA_N/VFMAQ_N"
+
void exec_vfma_n (void)
{
/* Basic test: v4=vfma_n(v1,v2), then store the result. */
#define TEST_VFMA(Q, T1, T2, W, N) \
VECT_VAR(vector_res, T1, W, N) = \
vfma##Q##_n_##T2##W(VECT_VAR(vector1, T1, W, N), \
- VECT_VAR(vector2, T1, W, N), \
- VECT_VAR_ASSIGN(Scalar, Q, T1, W));
\
+ VECT_VAR(vector2, T1, W, N), \
+ VECT_VAR_ASSIGN(scalar, Q, T1, W)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
#define CHECK_VFMA_RESULTS(test_name,comment) \
{ \
CHECK_FP(test_name, float, 32, 2, PRIx32, expected, comment); \
CHECK_FP(test_name, float, 32, 4, PRIx32, expected, comment); \
- CHECK_FP(test_name, float, 64, 2, PRIx64, expected, comment); \
- }
+ }
#define DECL_VABD_VAR(VAR) \
DECL_VARIABLE(VAR, float, 32, 2); \
- DECL_VARIABLE(VAR, float, 32, 4); \
- DECL_VARIABLE(VAR, float, 64, 2);
+ DECL_VARIABLE(VAR, float, 32, 4);
DECL_VABD_VAR(vector1);
DECL_VABD_VAR(vector2);
@@ -42,28 +41,27 @@ void exec_vfma_n (void)
/* Initialize input "vector1" from "buffer". */
VLOAD(vector1, buffer, , float, f, 32, 2);
VLOAD(vector1, buffer, q, float, f, 32, 4);
- VLOAD(vector1, buffer, q, float, f, 64, 2);
/* Choose init value arbitrarily. */
VDUP(vector2, , float, f, 32, 2, 9.3f);
VDUP(vector2, q, float, f, 32, 4, 29.7f);
- VDUP(vector2, q, float, f, 64, 2, 15.8f);
/* Choose init value arbitrarily. */
- ASSIGN(Scalar, , float, 32, 81.2f);
- ASSIGN(Scalar, q, float, 32, 36.8f);
- ASSIGN(Scalar, q, float, 64, 51.7f);
+ ASSIGN(scalar, , float, 32, 81.2f);
+ ASSIGN(scalar, q, float, 32, 36.8f);
/* Execute the tests. */
TEST_VFMA(, float, f, 32, 2);
TEST_VFMA(q, float, f, 32, 4);
- TEST_VFMA(q, float, f, 64, 2);
CHECK_VFMA_RESULTS (TEST_MSG, "");
}
+#endif
int main (void)
{
+#ifdef __aarch64__
exec_vfma_n ();
+#endif
return 0;
}
Index: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfma.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfma.c (revision
218582)
+++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfma.c (working copy)
@@ -2,12 +2,13 @@
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
+#ifdef __ARM_FEATURE_FMA
/* Expected results. */
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0x4438ca3d, 0x44390a3d };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0x44869eb8, 0x4486beb8, 0x4486deb8,
0x4486feb8 };
-VECT_VAR_DECL(expected,hfloat,64,2) [] = { 0x408906e1532b8520,
0x40890ee1532b8520 };
#define TEST_MSG "VFMA/VFMAQ"
+
void exec_vfma (void)
{
/* Basic test: v4=vfma(v1,v2), then store the result. */
@@ -15,20 +16,18 @@ void exec_vfma (void)
VECT_VAR(vector_res, T1, W, N) = \
vfma##Q##_##T2##W(VECT_VAR(vector1, T1, W, N), \
VECT_VAR(vector2, T1, W, N), \
- VECT_VAR(vector3, T1, W, N)); \
+ VECT_VAR(vector3, T1, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
#define CHECK_VFMA_RESULTS(test_name,comment) \
{ \
CHECK_FP(test_name, float, 32, 2, PRIx32, expected, comment); \
CHECK_FP(test_name, float, 32, 4, PRIx32, expected, comment); \
- CHECK_FP(test_name, float, 64, 2, PRIx64, expected, comment); \
- }
+ }
#define DECL_VABD_VAR(VAR) \
DECL_VARIABLE(VAR, float, 32, 2); \
- DECL_VARIABLE(VAR, float, 32, 4); \
- DECL_VARIABLE(VAR, float, 64, 2);
+ DECL_VARIABLE(VAR, float, 32, 4);
DECL_VABD_VAR(vector1);
DECL_VABD_VAR(vector2);
@@ -40,28 +39,27 @@ void exec_vfma (void)
/* Initialize input "vector1" from "buffer". */
VLOAD(vector1, buffer, , float, f, 32, 2);
VLOAD(vector1, buffer, q, float, f, 32, 4);
- VLOAD(vector1, buffer, q, float, f, 64, 2);
/* Choose init value arbitrarily. */
VDUP(vector2, , float, f, 32, 2, 9.3f);
VDUP(vector2, q, float, f, 32, 4, 29.7f);
- VDUP(vector2, q, float, f, 64, 2, 15.8f);
/* Choose init value arbitrarily. */
VDUP(vector3, , float, f, 32, 2, 81.2f);
VDUP(vector3, q, float, f, 32, 4, 36.8f);
- VDUP(vector3, q, float, f, 64, 2, 51.7f);
/* Execute the tests. */
TEST_VFMA(, float, f, 32, 2);
TEST_VFMA(q, float, f, 32, 4);
- TEST_VFMA(q, float, f, 64, 2);
CHECK_VFMA_RESULTS (TEST_MSG, "");
}
+#endif
int main (void)
{
+#ifdef __ARM_FEATURE_FMA
exec_vfma ();
+#endif
return 0;
}
Index: gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms.c (revision
218582)
+++ gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfms.c (working copy)
@@ -2,12 +2,13 @@
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
+#ifdef __ARM_FEATURE_FMA
/* Expected results. */
VECT_VAR_DECL(expected,hfloat,32,2) [] = { 0xc440ca3d, 0xc4408a3d };
VECT_VAR_DECL(expected,hfloat,32,4) [] = { 0xc48a9eb8, 0xc48a7eb8, 0xc48a5eb8,
0xc48a3eb8 };
-VECT_VAR_DECL(expected,hfloat,64,2) [] = { 0xc08a06e1532b8520,
0xc089fee1532b8520 };
-#define TEST_MSG "VFMA/VFMAQ"
+#define TEST_MSG "VFMS/VFMSQ"
+
void exec_vfms (void)
{
/* Basic test: v4=vfms(v1,v2), then store the result. */
@@ -15,20 +16,18 @@ void exec_vfms (void)
VECT_VAR(vector_res, T1, W, N) = \
vfms##Q##_##T2##W(VECT_VAR(vector1, T1, W, N), \
VECT_VAR(vector2, T1, W, N), \
- VECT_VAR(vector3, T1, W, N)); \
+ VECT_VAR(vector3, T1, W, N)); \
vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
#define CHECK_VFMA_RESULTS(test_name,comment) \
{ \
CHECK_FP(test_name, float, 32, 2, PRIx32, expected, comment); \
CHECK_FP(test_name, float, 32, 4, PRIx32, expected, comment); \
- CHECK_FP(test_name, float, 64, 2, PRIx64, expected, comment); \
- }
+ }
#define DECL_VABD_VAR(VAR) \
DECL_VARIABLE(VAR, float, 32, 2); \
- DECL_VARIABLE(VAR, float, 32, 4); \
- DECL_VARIABLE(VAR, float, 64, 2);
+ DECL_VARIABLE(VAR, float, 32, 4);
DECL_VABD_VAR(vector1);
DECL_VABD_VAR(vector2);
@@ -40,28 +39,27 @@ void exec_vfms (void)
/* Initialize input "vector1" from "buffer". */
VLOAD(vector1, buffer, , float, f, 32, 2);
VLOAD(vector1, buffer, q, float, f, 32, 4);
- VLOAD(vector1, buffer, q, float, f, 64, 2);
/* Choose init value arbitrarily. */
VDUP(vector2, , float, f, 32, 2, 9.3f);
VDUP(vector2, q, float, f, 32, 4, 29.7f);
- VDUP(vector2, q, float, f, 64, 2, 15.8f);
/* Choose init value arbitrarily. */
VDUP(vector3, , float, f, 32, 2, 81.2f);
VDUP(vector3, q, float, f, 32, 4, 36.8f);
- VDUP(vector3, q, float, f, 64, 2, 51.7f);
/* Execute the tests. */
TEST_VFMA(, float, f, 32, 2);
TEST_VFMA(q, float, f, 32, 4);
- TEST_VFMA(q, float, f, 64, 2);
CHECK_VFMA_RESULTS (TEST_MSG, "");
}
+#endif
int main (void)
{
+#ifdef __ARM_FEATURE_FMA
exec_vfms ();
+#endif
return 0;
}
Index: gcc/testsuite/ChangeLog
===================================================================
--- gcc/testsuite/ChangeLog (revision 218582)
+++ gcc/testsuite/ChangeLog (working copy)
@@ -1,3 +1,13 @@
+2014-12-11 Felix Yang <felix.y...@huawei.com>
+ Haijian Zhang <z.zhanghaij...@huawei.com>
+
+ * gcc.target/aarch64/advsimd-intrinsics/vfma.c: Exclude test for
vfmaq_f64
+ intrinsic and don't run on arm*-*-* target without the FMA feature.
+ * gcc.target/aarch64/advsimd-intrinsics/vfms.c: Exclude test for
vfmsq_f64
+ intrinsic and don't run on arm*-*-* target without the FMA feature.
+ * gcc.target/aarch64/advsimd-intrinsics/vfma_n.c: Exclude test for
vfmaq_n_f64
+ intrinsic and don't run on arm*-*-* target.
+
2014-12-10 Martin Liska <mli...@suse.cz>
* gcc.dg/ipa/pr63909.c: New test.
fix-neon-testcases-v1.diff
Description: fix-neon-testcases-v1.diff
