Dear contributor,

Our automatic CI has detected problems related to your patch(es). Please find 
some details below.

In  master-arm, after:
  | commit gcc-16-7209-gc035985fd611
  | Author: Alexandre Oliva <[email protected]>
  | Date:   Sat Jan 31 01:52:10 2026 -0300
  | 
  |     testsuite: arm: crypto-vsha1*_u32 tests got late-combine improvements
  |     
  |     The late-combine pass enabled some of the vdup.32 instructions
  |     expected in crypto-vsha1*_u32 tests to use d registers, so accept them
  |     as well.
  | ... 12 lines of the commit log omitted.

Produces 4 regressions 4 fixes:
  | 
  | regressions.sum:
  | Running gcc:gcc.target/arm/arm.exp ...
  | FAIL: gcc.target/arm/crypto-vsha1cq_u32.c scan-assembler-times 
vdup.32\\tq[0-9]+, (?:r[0-9]+|d[0-9]+\\[[0-9]+\\]) 4
  | FAIL: gcc.target/arm/crypto-vsha1h_u32.c scan-assembler-times 
vdup.32\\tq[0-9]+, (?:r[0-9]+|d[0-9]+\\[[0-9]+\\]) 4
  | FAIL: gcc.target/arm/crypto-vsha1mq_u32.c scan-assembler-times 
vdup.32\\tq[0-9]+, (?:r[0-9]+|d[0-9]+\\[[0-9]+\\]) 4
  | FAIL: gcc.target/arm/crypto-vsha1pq_u32.c scan-assembler-times 
vdup.32\\tq[0-9]+, (?:r[0-9]+|d[0-9]+\\[[0-9]+\\]) 4
  | 
  | fixes.sum:
  | Running gcc:gcc.target/arm/arm.exp ...
  | FAIL: gcc.target/arm/crypto-vsha1cq_u32.c scan-assembler-times 
vdup.32\\tq[0-9]+, r[0-9]+ 4
  | FAIL: gcc.target/arm/crypto-vsha1h_u32.c scan-assembler-times 
vdup.32\\tq[0-9]+, r[0-9]+ 4
  | FAIL: gcc.target/arm/crypto-vsha1mq_u32.c scan-assembler-times 
vdup.32\\tq[0-9]+, r[0-9]+ 4
  | FAIL: gcc.target/arm/crypto-vsha1pq_u32.c scan-assembler-times 
vdup.32\\tq[0-9]+, r[0-9]+ 4

Used configuration :
 *CI config* tcwg_gnu_cross_check_gcc master-arm
 *configure and test flags:* --target arm-linux-gnueabihf 

We track this bug report under https://linaro.atlassian.net/browse/GNU-1830. 
Please let us know if you have a fix.

If you have any questions regarding this report, please ask on 
[email protected] mailing list.

-----------------8<--------------------------8<--------------------------8<--------------------------

The information below contains the details of the failures, and the ways to 
reproduce a debug environment:

You can find the failure logs in *.log.1.xz files in
 * 
https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-build/2602/artifact/artifacts/00-sumfiles/
The full lists of regressions and improvements as well as configure and make 
commands are in
 * 
https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-build/2602/artifact/artifacts/notify/
The list of [ignored] baseline and flaky failures are in
 * 
https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-build/2602/artifact/artifacts/sumfiles/xfails.xfail

Current build   : 
https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-build/2602/artifact/artifacts
Reference build : 
https://ci.linaro.org/job/tcwg_gnu_cross_check_gcc--master-arm-build/2601/artifact/artifacts

Instruction to reproduce the build : 
https://gitlab.com/LinaroLtd/tcwg/ci/interesting-commits/-/raw/master/gcc/sha1/c035985fd611dfb2e43b31ce64faf562f3804c49/tcwg_gnu_cross_check_gcc/master-arm/reproduction_instructions.txt

Full commit : See in git+ssh://[email protected]/git/gcc.git

Reply via email to