Well, both Intel and AMD calls fisttp a SSE3 instruction even though
it operates on the x87 stack ST(0). My argument is users who specify -
msse3 to turn on SSE3 instructions would expect fisttp be turned on
as well.
But according to the manual -msse3 does not turn on generation of
SSE3 instructions:
-mmmx
-mno-mmx
-msse
-mno-sse
-msse2
-mno-sse2
-msse3
-mno-sse3
-m3dnow
-mno-3dnow
These switches enable or disable the use of built-in functions that
allow direct access to the MMX, SSE, SSE2, SSE3 and 3Dnow
extensions of the instruction set.
See X86 Built-in Functions, for details of the functions enabled
and disabled by these switches.
To have SSE/SSE2 instructions generated automatically from floating-
point code, see -mfpmath=sse.
Thus the confusion.
Evan
On Oct 3, 2005, at 3:25 PM, Andrew Pinski wrote:
On Oct 3, 2005, at 5:56 PM, Evan Cheng wrote:
My mistake. I misunderstood the meaning of -msse3 (it only enables
the sse3 builtins). Please ignore.
Actually it enables more than the builtins. It enables the use sse3
instructions. This is just like -maltivec on PowerPC and -msse and
-msse
on x86, etc.
Hmm, but from the original patch:
http://gcc.gnu.org/ml/gcc-patches/2005-03/msg01119.html
"BTW: Regarding TARGET_FISTTP macro: according to documentation,
fisttp insn indeed depends on (TARGET_80387 && TARGET_SSE3).
However, this insn is not a SSE3 instruction, so it should not be
disabled by -mno-sse3 flag."
And then RTH agreed:
http://gcc.gnu.org/ml/gcc-patches/2005-03/msg01432.html
So from the sound of it fisttp is not a SSE3 instruction.
Thanks,
Andrew Pinski
