On Tue, Feb 14, 2006 at 11:48:36AM -0800, Mark Mitchell wrote:
> Richard Guenther wrote:
>
> >>PR26258: wrong code caused by incorrect alias analyis.
> >
> > This is now fixed on both the branch and the mainline.
>
> Good.
>
> > I guess you meant 26258, the patch for 26029 is by Zdenek and still
> > lacks a review:
> > http://gcc.gnu.org/ml/gcc-patches/2006-02/msg00933.html
>
> I see Diego has now reviewed it.
>
> We'll proceed with the freeze as previously announced, at midnight,
> tonight, here in California.
>
I am senting this on behalf of Denis. We have tested it on ia64, x86
and x86-64. There are no regressions. It may affect many targets:
arc/arc.h:#define HAVE_PRE_INCREMENT 1
arc/arc.h:#define HAVE_PRE_DECREMENT 1
arm/arm.h:#define HAVE_POST_INCREMENT 1
arm/arm.h:#define HAVE_PRE_INCREMENT TARGET_ARM
arm/arm.h:#define HAVE_POST_DECREMENT TARGET_ARM
arm/arm.h:#define HAVE_PRE_DECREMENT TARGET_ARM
avr/avr.h:#define HAVE_POST_INCREMENT 1
avr/avr.h:#define HAVE_PRE_DECREMENT 1
bfin/bfin.h:#define HAVE_POST_INCREMENT 1
bfin/bfin.h:#define HAVE_POST_DECREMENT 1
bfin/bfin.h:#define HAVE_PRE_DECREMENT 1
c4x/c4x.h:#define HAVE_POST_INCREMENT 1
c4x/c4x.h:#define HAVE_PRE_INCREMENT 1
c4x/c4x.h:#define HAVE_POST_DECREMENT 1
c4x/c4x.h:#define HAVE_PRE_DECREMENT 1
cris/cris.h:#define HAVE_POST_INCREMENT 1
crx/crx.h:#define HAVE_POST_INCREMENT 1
crx/crx.h:#define HAVE_POST_DECREMENT 1
h8300/h8300.h:#define HAVE_POST_INCREMENT 1
h8300/h8300.h:#define HAVE_PRE_DECREMENT 1
h8300/h8300.h:#define HAVE_POST_DECREMENT TARGET_H8300SX
h8300/h8300.h:#define HAVE_PRE_INCREMENT TARGET_H8300SX
ia64/ia64.h:#define HAVE_POST_INCREMENT 1
ia64/ia64.h:#define HAVE_POST_DECREMENT 1
m32c/m32c.h:#define HAVE_PRE_DECREMENT 1
m32c/m32c.h:#define HAVE_POST_INCREMENT 1
m32r/m32r.h:#define HAVE_PRE_DECREMENT 1
m32r/m32r.h:#define HAVE_PRE_INCREMENT 1
m32r/m32r.h:#define HAVE_POST_INCREMENT 1
m68hc11/m68hc11.h:#define HAVE_POST_INCREMENT (TARGET_M6812 &&
TARGET_AUTO_INC_DEC)
m68hc11/m68hc11.h:#define HAVE_PRE_INCREMENT (TARGET_M6812 &&
TARGET_AUTO_INC_DEC)
m68hc11/m68hc11.h:#define HAVE_POST_DECREMENT (TARGET_M6812 &&
TARGET_AUTO_INC_DEC)
m68hc11/m68hc11.h:#define HAVE_PRE_DECREMENT (TARGET_M6812 &&
TARGET_AUTO_INC_DEC)
m68k/m68k.h:#define HAVE_POST_INCREMENT 1
m68k/m68k.h:#define HAVE_PRE_DECREMENT 1
mn10300/mn10300.h:#define HAVE_POST_INCREMENT (TARGET_AM33)
pa/pa.h:#define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
pa/pa.h:#define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
pa/pa.h:#define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
pa/pa.h:#define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
pdp11/pdp11.h:#define HAVE_POST_INCREMENT 1
pdp11/pdp11.h:#define HAVE_PRE_DECREMENT 1
rs6000/rs6000.h:#define HAVE_PRE_DECREMENT 1
rs6000/rs6000.h:#define HAVE_PRE_INCREMENT 1
sh/sh.h:#define HAVE_POST_INCREMENT TARGET_SH1
sh/sh.h:#define HAVE_PRE_DECREMENT TARGET_SH1
stormy16/stormy16.h:#define HAVE_POST_INCREMENT 1
stormy16/stormy16.h:#define HAVE_PRE_DECREMENT 1
vax/vax.h:#define HAVE_POST_INCREMENT 1
vax/vax.h:#define HAVE_PRE_DECREMENT 1
H.J.
----
2006-02-13 Denis Nagorny <[EMAIL PROTECTED]>
PR rtl-optimization/25603
* reload.c (reg_inc_found_and_valid_p): New.
(regno_clobbered_p): Handle REG_INC as 25603 workaround.
Index: reload.c
===================================================================
*** reload.c (revision 110738)
--- reload.c (working copy)
*************** static int find_inc_amount (rtx, rtx);
*** 281,286 ****
--- 281,287 ----
static int refers_to_mem_for_reload_p (rtx);
static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
rtx, rtx *);
+ static int reg_inc_found_and_valid_p(unsigned int, unsigned int, rtx);
/* Determine if any secondary reloads are needed for loading (if IN_P is
nonzero) or storing (if IN_P is zero) X to or from a reload register of
*************** find_inc_amount (rtx x, rtx inced)
*** 6941,6946 ****
--- 6942,6975 ----
return 0;
}
+ /* Return 1 if insn uses the register with REG_INC note and with REGNO
greater
+ or equal then regno. Created as part of workaround for 25603 */
+
+ static int
+ reg_inc_found_and_valid_p(unsigned int regno ATTRIBUTE_UNUSED,
+ unsigned int endregno ATTRIBUTE_UNUSED,
+ rtx insn ATTRIBUTE_UNUSED)
+ {
+ #ifdef AUTO_INC_DEC
+ rtx link;
+
+ gcc_assert (insn);
+
+ if (! INSN_P (insn))
+ return 0;
+
+ for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
+ if (REG_NOTE_KIND (link) == REG_INC)
+ {
+ unsigned int test = (int) REGNO (XEXP (link, 0));
+ if (test >= regno && test < endregno)
+ return 1;
+ }
+ #endif
+ return 0;
+
+ }
+
/* Return 1 if register REGNO is the subject of a clobber in insn INSN.
If SETS is nonzero, also consider SETs. REGNO must refer to a hard
register. */
*************** regno_clobbered_p (unsigned int regno, r
*** 6966,6971 ****
--- 6995,7003 ----
return test >= regno && test < endregno;
}
+ if (reg_inc_found_and_valid_p(regno, endregno, insn))
+ return 1;
+
if (GET_CODE (PATTERN (insn)) == PARALLEL)
{
int i = XVECLEN (PATTERN (insn), 0) - 1;
*************** regno_clobbered_p (unsigned int regno, r
*** 6982,6987 ****
--- 7014,7021 ----
if (test >= regno && test < endregno)
return 1;
}
+ if (reg_inc_found_and_valid_p(regno, endregno, elt))
+ return 1;
}
}
