> Unless I'm delirious (it's way past bedtime) I see a m32c port
> and it's cc0-free. Is there a problem?
m32c has a separate $flg register defined, not a cc0 port.
Hence, this pattern:
(define_insn_and_split "cbranch<mode>4"
[(set (pc) (if_then_else
(match_operator 0 "m32c_cmp_operator"
[(match_operand:QHPSI 1 "mra_operand" "RraSd")
(match_operand:QHPSI 2 "mrai_operand" "iRraSd")])
(label_ref (match_operand 3 "" ""))
(pc)))]
""
"#"
""
[(set (reg:CC FLG_REGNO)
(compare (match_dup 1)
(match_dup 2)))
(set (pc) (if_then_else (match_dup 4)
(label_ref (match_dup 3))
(pc)))]
"operands[4] = m32c_cmp_flg_0 (operands[0]);"
)
