Andrew Pinski wrote:
On 3/4/07, Vladimir N. Makarov <[EMAIL PROTECTED]> wrote:
Another important thing to do is to make the 1st scheduler register
pressure sensitive.
I don't know how many times this has to be said, no this is not the
correct approach to fix that issue. The correct fix is able for the
register allocator to work correctly and fix up the IR.
I am not agree. Fixing it in RA after insn with hard register moved
will result in several additional insns of course unless you implement
moving insns in RA which makes it an insn scheduler. Also fixing this
in the reload is much more difficult task (needs more expertise) than in
the insn scheduler. Ideally integrated RA and scheduler (and code
selection) would be best solution but it is not realistic becuase even
after many years gcc has no decent separate scheduler and RA.
