Hi,
>> I am working on porting GCC to a new RISC architecture. The ISA does
>> not have a "Jump and Link Register" instruction. So I am simulating
>> one by replacing
>> jal [reg]
>> by
>> load ra, Lret
>> jr reg
>> Lret:
>>
>> in RTL.
>> But my return label is getting optimized away. Could you please tell
>> me how to avoid this.
>
>Make sure the load label instruction is using a LABEL_REF. Look at
> sh.md for various examples.
Is this correct :
ret_label = gen_label_rtx ();
emit_move_insn (gen_rtx_REG (HImode, 7),
gen_rtx_LABEL_REF (VOIDmode,
ret_label));
emit_call_insn (gen_brc_call_simulate (addr, args_size));
emit_label (ret_label);
Cheers,
Kunal